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review.coreboot.org / coreboot / 9631016660423d0585a1 / . / src / mainboard / amd / mahogany_fam10 / irq_tables.c
blob: 8c613da67c09066ea23a58bd1345cc8231437a47 [file] [log] [blame]
Zheng Bao584ab842010-03-16 01:53:10 +0000[diff] [blame]1/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Zheng Bao584ab842010-03-16 01:53:10 +0000[diff] [blame]14 */
15
16#include <console/console.h>
17#include <device/pci.h>
18#include <string.h>
19#include <stdint.h>
20#include <arch/pirq_routing.h>
21
22#include <cpu/amd/amdfam10_sysconf.h>
23
Stefan Reinauere9de1e22010-04-07 15:30:11 +0000[diff] [blame]24
Zheng Bao584ab842010-03-16 01:53:10 +0000[diff] [blame]25
26static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
27 u8 link0, u16 bitmap0, u8 link1, u16 bitmap1,
28 u8 link2, u16 bitmap2, u8 link3, u16 bitmap3,
29 u8 slot, u8 rfu)
30{
31 pirq_info->bus = bus;
32 pirq_info->devfn = devfn;
33 pirq_info->irq[0].link = link0;
34 pirq_info->irq[0].bitmap = bitmap0;
35 pirq_info->irq[1].link = link1;
36 pirq_info->irq[1].bitmap = bitmap1;
37 pirq_info->irq[2].link = link2;
38 pirq_info->irq[2].bitmap = bitmap2;
39 pirq_info->irq[3].link = link3;
40 pirq_info->irq[3].bitmap = bitmap3;
41 pirq_info->slot = slot;
42 pirq_info->rfu = rfu;
43}
Zheng Bao584ab842010-03-16 01:53:10 +0000[diff] [blame]44extern u8 bus_rs780[8];
45extern u8 bus_sb700[2];
46extern unsigned long sbdn_sb700;
47
48unsigned long write_pirq_routing_table(unsigned long addr)
49{
50 struct irq_routing_table *pirq;
51 struct irq_info *pirq_info;
52 u32 slot_num;
53 u8 *v;
54
55 u8 sum = 0;
56 int i;
57
58 get_bus_conf(); /* it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c */
59
60 /* Align the table to be 16 byte aligned. */
61 addr += 15;
62 addr &= ~15;
63
Kyösti Mälkki9533d832014-06-26 05:30:54 +0300[diff] [blame]64 /* This table must be between 0xf0000 & 0x100000 */
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +0000[diff] [blame]65 printk(BIOS_INFO, "Writing IRQ routing tables to 0x%lx...", addr);
Zheng Bao584ab842010-03-16 01:53:10 +0000[diff] [blame]66
67 pirq = (void *)(addr);
68 v = (u8 *) (addr);
69
70 pirq->signature = PIRQ_SIGNATURE;
71 pirq->version = PIRQ_VERSION;
72
73 pirq->rtr_bus = bus_sb700[0];
74 pirq->rtr_devfn = ((sbdn_sb700 + 0x14) << 3) | 4;
75
76 pirq->exclusive_irqs = 0;
77
78 pirq->rtr_vendor = 0x1002;
79 pirq->rtr_device = 0x4384;
80
81 pirq->miniport_data = 0;
82
83 memset(pirq->rfu, 0, sizeof(pirq->rfu));
84
85 pirq_info = (void *)(&pirq->checksum + 1);
86 slot_num = 0;
87
88 /* pci bridge */
89 write_pirq_info(pirq_info, bus_sb700[0], ((sbdn_sb700 + 0x14) << 3) | 4,
90 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0,
91 0);
92 pirq_info++;
93 slot_num++;
94
95 pirq->size = 32 + 16 * slot_num;
96
97 for (i = 0; i < pirq->size; i++)
98 sum += v[i];
99
100 sum = pirq->checksum - sum;
101 if (sum != pirq->checksum) {
102 pirq->checksum = sum;
103 }
104
Stefan Reinauerc02b4fc2010-03-22 11:42:32 +0000[diff] [blame]105 printk(BIOS_INFO, "write_pirq_routing_table done.\n");
Zheng Bao584ab842010-03-16 01:53:10 +0000[diff] [blame]106
107 return (unsigned long)pirq_info;
108}