Gitiles
Code Review
Sign In
review.coreboot.org
/
coreboot
/
9631016660423d0585a1
/
.
/
src
/
cpu
/
intel
/
speedstep
/
Makefile.inc
blob: eddd4f34df3e6c9fd57e6abe6464addee3fd8bcb [
file
] [
log
] [
blame
]
Vladimir Serbinenko
822bc65
2014-01-03 15:55:40 +0100
[
diff
] [
blame
]
1
ramstage
-
y
+=
acpi
.
c speedstep
.
c