Patrick Georgi | 88f55b2 | 2009-09-25 18:43:02 +0000 | [diff] [blame] | 1 | config CPU_INTEL_SOCKET_MPGA604 |
| 2 | bool |
Kyösti Mälkki | abdf15f | 2012-02-28 14:01:34 +0200 | [diff] [blame] | 3 | |
| 4 | if CPU_INTEL_SOCKET_MPGA604 |
| 5 | |
| 6 | config SOCKET_SPECIFIC_OPTIONS # dummy |
| 7 | def_bool y |
Patrick Georgi | 88f55b2 | 2009-09-25 18:43:02 +0000 | [diff] [blame] | 8 | select CPU_INTEL_MODEL_F2X |
| 9 | select CPU_INTEL_MODEL_F3X |
| 10 | select CPU_INTEL_MODEL_F4X |
Ronald G. Minnich | cc2b9f2 | 2009-10-08 16:06:09 +0000 | [diff] [blame] | 11 | select MMX |
| 12 | select SSE |
Patrick Georgi | e8d943f | 2010-01-25 15:17:11 +0000 | [diff] [blame] | 13 | select UDELAY_TSC |
Kyösti Mälkki | f8c7c23 | 2012-04-06 04:03:50 +0300 | [diff] [blame] | 14 | select SIPI_VECTOR_IN_ROM |
Stefan Reinauer | d4ab7c5 | 2010-03-17 02:09:12 +0000 | [diff] [blame] | 15 | |
| 16 | # mPGA604 are usually Intel Netburst CPUs which should have SSE2 |
Stefan Reinauer | 14e2277 | 2010-04-27 06:56:47 +0000 | [diff] [blame] | 17 | # but the ramtest.c code on the Dell S1850 seems to choke on |
Stefan Reinauer | d4ab7c5 | 2010-03-17 02:09:12 +0000 | [diff] [blame] | 18 | # enabling it, so disable it for now. |
| 19 | config SSE2 |
| 20 | bool |
| 21 | default n |
Kyösti Mälkki | abdf15f | 2012-02-28 14:01:34 +0200 | [diff] [blame] | 22 | |
| 23 | config DCACHE_RAM_BASE |
| 24 | hex |
| 25 | default 0x0ffafc000 |
| 26 | |
| 27 | config DCACHE_RAM_SIZE |
| 28 | hex |
| 29 | default 0x4000 |
| 30 | |
| 31 | endif # CPU_INTEL_SOCKET_MPGA604 |