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Eric Biedermanfcd5ace2004-10-14 19:29:29 +00001#include <console/console.h>
2#include <device/device.h>
Eric Biedermanfcd5ace2004-10-14 19:29:29 +00003#include <string.h>
4#include <cpu/cpu.h>
5#include <cpu/x86/mtrr.h>
6#include <cpu/x86/msr.h>
7#include <cpu/x86/lapic.h>
8#include <cpu/intel/microcode.h>
9#include <cpu/intel/hyperthreading.h>
10#include <cpu/x86/cache.h>
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000011
Edward O'Callaghan2c9d2cf2014-10-27 23:29:29 +110012static void model_f3x_init(struct device *cpu)
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000013{
14 /* Turn on caching if we haven't already */
15 x86_enable_cache();
Stefan Reinauer14e22772010-04-27 06:56:47 +000016
Kyösti Mälkki9ed14562012-06-27 16:14:49 +030017 if (!intel_ht_sibling()) {
18 /* MTRRs are shared between threads */
19 x86_setup_mtrrs();
20 x86_mtrr_check();
21
22 /* Update the microcode */
Alexandru Gagniuc2c38f502013-12-06 23:14:54 -060023 intel_update_microcode_from_cbfs();
Kyösti Mälkki9ed14562012-06-27 16:14:49 +030024 }
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000025
26 /* Enable the local cpu apics */
27 setup_lapic();
Sven Schnelle51676b12012-07-29 19:18:03 +020028
29 /* Start up my cpu siblings */
30 intel_sibling_init(cpu);
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000031};
32
33static struct device_operations cpu_dev_ops = {
34 .init = model_f3x_init,
35};
Uwe Hermann554c0522010-10-07 23:42:17 +000036
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000037static struct cpu_device_id cpu_table[] = {
38 { X86_VENDOR_INTEL, 0x0f34 }, /* Xeon */
39 { 0, 0 },
40};
41
Stefan Reinauer124e4a42007-10-24 11:10:21 +000042static const struct cpu_driver model_f3x __cpu_driver = {
Eric Biedermanfcd5ace2004-10-14 19:29:29 +000043 .ops = &cpu_dev_ops,
44 .id_table = cpu_table,
45};