Keith Hui | b14fb6a | 2010-10-16 08:45:31 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2007-2009 coresystems GmbH |
| 5 | * Copyright (C) 2010 Keith Hui <buurin@gmail.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Keith Hui | b14fb6a | 2010-10-16 08:45:31 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <stdint.h> |
| 18 | #include <device/device.h> |
Keith Hui | b14fb6a | 2010-10-16 08:45:31 +0000 | [diff] [blame] | 19 | #include <cpu/cpu.h> |
| 20 | #include <cpu/x86/mtrr.h> |
| 21 | #include <cpu/x86/msr.h> |
| 22 | #include <cpu/x86/lapic.h> |
| 23 | #include <cpu/intel/microcode.h> |
| 24 | #include <cpu/x86/cache.h> |
Keith Hui | 1ac19e2 | 2011-07-27 23:06:16 -0400 | [diff] [blame] | 25 | #include <cpu/intel/l2_cache.h> |
Keith Hui | b14fb6a | 2010-10-16 08:45:31 +0000 | [diff] [blame] | 26 | |
Edward O'Callaghan | 2c9d2cf | 2014-10-27 23:29:29 +1100 | [diff] [blame] | 27 | static void model_65x_init(struct device *dev) |
Keith Hui | b14fb6a | 2010-10-16 08:45:31 +0000 | [diff] [blame] | 28 | { |
Keith Hui | 1ac19e2 | 2011-07-27 23:06:16 -0400 | [diff] [blame] | 29 | /* Update the microcode */ |
Alexandru Gagniuc | 2c38f50 | 2013-12-06 23:14:54 -0600 | [diff] [blame] | 30 | intel_update_microcode_from_cbfs(); |
Keith Hui | 1ac19e2 | 2011-07-27 23:06:16 -0400 | [diff] [blame] | 31 | /* Initialize L2 cache */ |
| 32 | p6_configure_l2_cache(); |
| 33 | |
Keith Hui | b14fb6a | 2010-10-16 08:45:31 +0000 | [diff] [blame] | 34 | /* Turn on caching if we haven't already */ |
| 35 | x86_enable_cache(); |
Sven Schnelle | adfbcb79 | 2012-01-10 12:01:43 +0100 | [diff] [blame] | 36 | x86_setup_mtrrs(); |
Keith Hui | b14fb6a | 2010-10-16 08:45:31 +0000 | [diff] [blame] | 37 | x86_mtrr_check(); |
| 38 | |
Keith Hui | b14fb6a | 2010-10-16 08:45:31 +0000 | [diff] [blame] | 39 | /* Enable the local cpu apics */ |
| 40 | setup_lapic(); |
| 41 | }; |
| 42 | |
| 43 | static struct device_operations cpu_dev_ops = { |
| 44 | .init = model_65x_init, |
| 45 | }; |
| 46 | |
| 47 | /* |
| 48 | * Intel Pentium II Processor Specification Update |
| 49 | * http://download.intel.com/design/PentiumII/specupdt/24333749.pdf |
| 50 | * |
| 51 | * Mobile Intel Pentium II Processor Specification Update |
| 52 | * http://download.intel.com/design/intarch/specupdt/24388757.pdf |
| 53 | * |
| 54 | * Intel Pentium II Xeon Processor Specification Update |
| 55 | * http://download.intel.com/support/processors/pentiumii/xeon/24377632.pdf |
| 56 | */ |
| 57 | static struct cpu_device_id cpu_table[] = { |
| 58 | { X86_VENDOR_INTEL, 0x0650 }, /* PII/Celeron, dA0/mdA0/A0 */ |
| 59 | { X86_VENDOR_INTEL, 0x0651 }, /* PII/Celeron, dA1/A1 */ |
| 60 | { X86_VENDOR_INTEL, 0x0652 }, /* PII/Celeron/Xeon, dB0/mdB0/B0 */ |
| 61 | { X86_VENDOR_INTEL, 0x0653 }, /* PII/Xeon, dB1/B1 */ |
| 62 | { 0, 0 }, |
| 63 | }; |
| 64 | |
| 65 | static const struct cpu_driver driver __cpu_driver = { |
| 66 | .ops = &cpu_dev_ops, |
| 67 | .id_table = cpu_table, |
| 68 | }; |