Cristi Magherusan | 7ec3f67 | 2009-08-27 22:19:23 +0000 | [diff] [blame] | 1 | config CPU_AMD_SOCKET_S1G1 |
Martin Roth | 595e777 | 2015-04-26 18:53:26 -0600 | [diff] [blame] | 2 | bool |
Stefan Reinauer | d4d0a45 | 2010-09-30 07:56:12 +0000 | [diff] [blame] | 3 | |
4 | if CPU_AMD_SOCKET_S1G1 | ||||
5 | |||||
6 | config SOCKET_SPECIFIC_OPTIONS | ||||
7 | def_bool y | ||||
Patrick Georgi | 5e54871 | 2009-09-29 14:38:10 +0000 | [diff] [blame] | 8 | select K8_REV_F_SUPPORT |
9 | select K8_HT_FREQ_1G_SUPPORT | ||||
Myles Watson | 20d5c2e | 2009-10-01 16:24:58 +0000 | [diff] [blame] | 10 | select CPU_AMD_MODEL_FXX |
Aaron Durbin | 57686f8 | 2013-03-20 15:50:59 -0500 | [diff] [blame] | 11 | select X86_AMD_FIXED_MTRRS |
Cristi Magherusan | 7ec3f67 | 2009-08-27 22:19:23 +0000 | [diff] [blame] | 12 | |
13 | config CPU_SOCKET_TYPE | ||||
14 | hex | ||||
15 | default 0x12 | ||||
Cristi Magherusan | 7ec3f67 | 2009-08-27 22:19:23 +0000 | [diff] [blame] | 16 | |
Cristi Magherusan | 7ec3f67 | 2009-08-27 22:19:23 +0000 | [diff] [blame] | 17 | #DDR2 and REG, S1G1 |
18 | config DIMM_SUPPORT | ||||
19 | hex | ||||
20 | default 0x0204 | ||||
Cristi Magherusan | 7ec3f67 | 2009-08-27 22:19:23 +0000 | [diff] [blame] | 21 | |
Stefan Reinauer | d4d0a45 | 2010-09-30 07:56:12 +0000 | [diff] [blame] | 22 | config DCACHE_RAM_BASE |
23 | hex | ||||
24 | default 0xc8000 | ||||
25 | |||||
26 | config DCACHE_RAM_SIZE | ||||
27 | hex | ||||
28 | default 0x08000 | ||||
29 | |||||
Timothy Pearson | b5e4655 | 2015-06-02 13:47:36 -0500 | [diff] [blame] | 30 | config DCACHE_BSP_STACK_SIZE |
31 | hex | ||||
32 | default 0x2000 | ||||
33 | |||||
Timothy Pearson | fb39f82 | 2015-06-02 20:25:03 -0500 | [diff] [blame] | 34 | config DCACHE_BSP_STACK_SLUSH |
35 | hex | ||||
36 | default 0x1000 | ||||
37 | |||||
Timothy Pearson | b5e4655 | 2015-06-02 13:47:36 -0500 | [diff] [blame] | 38 | config DCACHE_AP_STACK_SIZE |
39 | hex | ||||
40 | default 0x400 | ||||
41 | |||||
Stefan Reinauer | d4d0a45 | 2010-09-30 07:56:12 +0000 | [diff] [blame] | 42 | endif |