| Thaminda Edirisooriya | 31f0521 | 2015-08-26 12:22:29 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Early initialization code for riscv |
| 3 | * |
| 4 | * Copyright 2015 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation; version 2 of |
| 9 | * the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the |
| 14 | * GNU General Public License for more details. |
| Thaminda Edirisooriya | 31f0521 | 2015-08-26 12:22:29 -0700 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #include <bits.h> |
| 18 | .macro restore_regs |
| 19 | # restore x registers |
| 20 | LOAD x1,1*REGBYTES(a0) |
| 21 | LOAD x2,2*REGBYTES(a0) |
| 22 | LOAD x3,3*REGBYTES(a0) |
| 23 | LOAD x4,4*REGBYTES(a0) |
| 24 | LOAD x5,5*REGBYTES(a0) |
| 25 | LOAD x6,6*REGBYTES(a0) |
| 26 | LOAD x7,7*REGBYTES(a0) |
| 27 | LOAD x8,8*REGBYTES(a0) |
| 28 | LOAD x9,9*REGBYTES(a0) |
| 29 | LOAD x11,11*REGBYTES(a0) |
| 30 | LOAD x12,12*REGBYTES(a0) |
| 31 | LOAD x13,13*REGBYTES(a0) |
| 32 | LOAD x14,14*REGBYTES(a0) |
| 33 | LOAD x15,15*REGBYTES(a0) |
| 34 | LOAD x16,16*REGBYTES(a0) |
| 35 | LOAD x17,17*REGBYTES(a0) |
| 36 | LOAD x18,18*REGBYTES(a0) |
| 37 | LOAD x19,19*REGBYTES(a0) |
| 38 | LOAD x20,20*REGBYTES(a0) |
| 39 | LOAD x21,21*REGBYTES(a0) |
| 40 | LOAD x22,22*REGBYTES(a0) |
| 41 | LOAD x23,23*REGBYTES(a0) |
| 42 | LOAD x24,24*REGBYTES(a0) |
| 43 | LOAD x25,25*REGBYTES(a0) |
| 44 | LOAD x26,26*REGBYTES(a0) |
| 45 | LOAD x27,27*REGBYTES(a0) |
| 46 | LOAD x28,28*REGBYTES(a0) |
| 47 | LOAD x29,29*REGBYTES(a0) |
| 48 | LOAD x30,30*REGBYTES(a0) |
| 49 | LOAD x31,31*REGBYTES(a0) |
| 50 | # restore a0 last |
| 51 | LOAD x10,10*REGBYTES(a0) |
| 52 | |
| 53 | |
| 54 | .endm |
| 55 | .macro save_tf |
| 56 | # save gprs |
| 57 | STORE x1,1*REGBYTES(x2) |
| 58 | STORE x3,3*REGBYTES(x2) |
| 59 | STORE x4,4*REGBYTES(x2) |
| 60 | STORE x5,5*REGBYTES(x2) |
| 61 | STORE x6,6*REGBYTES(x2) |
| 62 | STORE x7,7*REGBYTES(x2) |
| 63 | STORE x8,8*REGBYTES(x2) |
| 64 | STORE x9,9*REGBYTES(x2) |
| 65 | STORE x10,10*REGBYTES(x2) |
| 66 | STORE x11,11*REGBYTES(x2) |
| 67 | STORE x12,12*REGBYTES(x2) |
| 68 | STORE x13,13*REGBYTES(x2) |
| 69 | STORE x14,14*REGBYTES(x2) |
| 70 | STORE x15,15*REGBYTES(x2) |
| 71 | STORE x16,16*REGBYTES(x2) |
| 72 | STORE x17,17*REGBYTES(x2) |
| 73 | STORE x18,18*REGBYTES(x2) |
| 74 | STORE x19,19*REGBYTES(x2) |
| 75 | STORE x20,20*REGBYTES(x2) |
| 76 | STORE x21,21*REGBYTES(x2) |
| 77 | STORE x22,22*REGBYTES(x2) |
| 78 | STORE x23,23*REGBYTES(x2) |
| 79 | STORE x24,24*REGBYTES(x2) |
| 80 | STORE x25,25*REGBYTES(x2) |
| 81 | STORE x26,26*REGBYTES(x2) |
| 82 | STORE x27,27*REGBYTES(x2) |
| 83 | STORE x28,28*REGBYTES(x2) |
| 84 | STORE x29,29*REGBYTES(x2) |
| 85 | STORE x30,30*REGBYTES(x2) |
| 86 | STORE x31,31*REGBYTES(x2) |
| 87 | |
| 88 | # get sr, epc, badvaddr, cause |
| 89 | csrrw t0,mscratch,x0 |
| 90 | csrr s0,mstatus |
| 91 | csrr t1,mepc |
| 92 | csrr t2,mbadaddr |
| 93 | csrr t3,mcause |
| 94 | STORE t0,2*REGBYTES(x2) |
| 95 | STORE s0,32*REGBYTES(x2) |
| 96 | STORE t1,33*REGBYTES(x2) |
| 97 | STORE t2,34*REGBYTES(x2) |
| 98 | STORE t3,35*REGBYTES(x2) |
| 99 | |
| 100 | # get faulting insn, if it wasn't a fetch-related trap |
| 101 | li x5,-1 |
| 102 | STORE x5,36*REGBYTES(x2) |
| 103 | 1: |
| 104 | .endm |
| 105 | |
| 106 | .text |
| 107 | .global supervisor_trap_entry |
| 108 | supervisor_trap_entry: |
| 109 | csrw mscratch, sp |
| 110 | # load in the top of the machine stack |
| Thaminda Edirisooriya | d9653e1 | 2015-09-10 10:55:17 -0700 | [diff] [blame] | 111 | la sp, 0x80FFF0 - 64 |
| Thaminda Edirisooriya | 31f0521 | 2015-08-26 12:22:29 -0700 | [diff] [blame] | 112 | 1:addi sp,sp,-320 |
| 113 | save_tf |
| 114 | move a0,sp |
| 115 | jal trap_handler |
| 116 | .global trap_entry |
| 117 | trap_entry: |
| 118 | csrw mscratch, sp |
| 119 | 1:addi sp,sp,-320 |
| Thaminda Edirisooriya | 95ba4c8 | 2015-08-26 14:54:31 -0700 | [diff] [blame] | 120 | save_tf |
| Thaminda Edirisooriya | 31f0521 | 2015-08-26 12:22:29 -0700 | [diff] [blame] | 121 | move a0,sp |
| 122 | jal trap_handler |
| 123 | .global supervisor_call_return |
| 124 | supervisor_call_return: |
| 125 | csrr a0, mscratch |
| 126 | restore_regs |
| 127 | eret # go back into supervisor call |
| 128 | .global machine_call_return |
| 129 | machine_call_return: |
| 130 | csrr a0, mscratch |
| 131 | restore_regs |
| 132 | eret # go back into machine call |