Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright 2014 Google Inc. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * 3. The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
| 16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | */ |
| 29 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 30 | #include <assert.h> |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 31 | #include <stdlib.h> |
| 32 | #include <stdint.h> |
| 33 | #include <string.h> |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 34 | #include <symbols.h> |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 35 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 36 | #include <console/console.h> |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 37 | #include <arch/mmu.h> |
| 38 | #include <arch/lib_helpers.h> |
| 39 | #include <arch/cache.h> |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 40 | #include <arch/cache_helpers.h> |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 41 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 42 | /* This just caches the next free table slot (okay to do since they fill up from |
| 43 | * bottom to top and can never be freed up again). It will reset to its initial |
| 44 | * value on stage transition, so we still need to check it for UNUSED_DESC. */ |
| 45 | static uint64_t *next_free_table = (void *)_ttb; |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 46 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 47 | static void print_tag(int level, uint64_t tag) |
| 48 | { |
Jimmy Huang | 2e01e8d | 2015-05-20 15:57:06 +0800 | [diff] [blame] | 49 | printk(level, tag & MA_MEM_NC ? "non-cacheable | " : |
| 50 | " cacheable | "); |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 51 | printk(level, tag & MA_RO ? "read-only | " : |
| 52 | "read-write | "); |
| 53 | printk(level, tag & MA_NS ? "non-secure | " : |
| 54 | " secure | "); |
| 55 | printk(level, tag & MA_MEM ? "normal\n" : |
| 56 | "device\n"); |
| 57 | } |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 58 | |
| 59 | /* Func : get_block_attr |
| 60 | * Desc : Get block descriptor attributes based on the value of tag in memrange |
| 61 | * region |
| 62 | */ |
| 63 | static uint64_t get_block_attr(unsigned long tag) |
| 64 | { |
| 65 | uint64_t attr; |
| 66 | |
| 67 | attr = (tag & MA_NS)? BLOCK_NS : 0; |
| 68 | attr |= (tag & MA_RO)? BLOCK_AP_RO : BLOCK_AP_RW; |
| 69 | attr |= BLOCK_ACCESS; |
Aaron Durbin | 4633dc1 | 2014-08-12 17:40:38 -0500 | [diff] [blame] | 70 | |
| 71 | if (tag & MA_MEM) { |
Furquan Shaikh | 55aa17b | 2015-03-27 22:52:18 -0700 | [diff] [blame] | 72 | attr |= BLOCK_SH_INNER_SHAREABLE; |
Aaron Durbin | 4633dc1 | 2014-08-12 17:40:38 -0500 | [diff] [blame] | 73 | if (tag & MA_MEM_NC) |
| 74 | attr |= BLOCK_INDEX_MEM_NORMAL_NC << BLOCK_INDEX_SHIFT; |
| 75 | else |
| 76 | attr |= BLOCK_INDEX_MEM_NORMAL << BLOCK_INDEX_SHIFT; |
| 77 | } else { |
| 78 | attr |= BLOCK_INDEX_MEM_DEV_NGNRNE << BLOCK_INDEX_SHIFT; |
Jimmy Huang | c159a0e | 2015-09-15 15:29:10 +0800 | [diff] [blame] | 79 | attr |= BLOCK_XN; |
Aaron Durbin | 4633dc1 | 2014-08-12 17:40:38 -0500 | [diff] [blame] | 80 | } |
| 81 | |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 82 | return attr; |
| 83 | } |
| 84 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 85 | /* Func : setup_new_table |
| 86 | * Desc : Get next free table from TTB and set it up to match old parent entry. |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 87 | */ |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 88 | static uint64_t *setup_new_table(uint64_t desc, size_t xlat_size) |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 89 | { |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 90 | while (next_free_table[0] != UNUSED_DESC) { |
| 91 | next_free_table += GRANULE_SIZE/sizeof(*next_free_table); |
| 92 | if (_ettb - (u8 *)next_free_table <= 0) |
| 93 | die("Ran out of page table space!"); |
| 94 | } |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 95 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 96 | void *frame_base = (void *)(desc & XLAT_ADDR_MASK); |
| 97 | printk(BIOS_DEBUG, "Backing address range [%p:%p) with new page" |
| 98 | " table @%p\n", frame_base, frame_base + |
| 99 | (xlat_size << BITS_RESOLVED_PER_LVL), next_free_table); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 100 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 101 | if (!desc) { |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 102 | memset(next_free_table, 0, GRANULE_SIZE); |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 103 | } else { |
| 104 | /* Can reuse old parent entry, but may need to adjust type. */ |
| 105 | if (xlat_size == L3_XLAT_SIZE) |
| 106 | desc |= PAGE_DESC; |
| 107 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 108 | int i = 0; |
| 109 | for (; i < GRANULE_SIZE/sizeof(*next_free_table); i++) { |
| 110 | next_free_table[i] = desc; |
| 111 | desc += xlat_size; |
| 112 | } |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 113 | } |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 114 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 115 | return next_free_table; |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 116 | } |
| 117 | |
| 118 | /* Func: get_next_level_table |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 119 | * Desc: Check if the table entry is a valid descriptor. If not, initialize new |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 120 | * table, update the entry and return the table addr. If valid, return the addr |
| 121 | */ |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 122 | static uint64_t *get_next_level_table(uint64_t *ptr, size_t xlat_size) |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 123 | { |
| 124 | uint64_t desc = *ptr; |
| 125 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 126 | if ((desc & DESC_MASK) != TABLE_DESC) { |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 127 | uint64_t *new_table = setup_new_table(desc, xlat_size); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 128 | desc = ((uint64_t)new_table) | TABLE_DESC; |
| 129 | *ptr = desc; |
| 130 | } |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 131 | return (uint64_t *)(desc & XLAT_ADDR_MASK); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 132 | } |
| 133 | |
| 134 | /* Func : init_xlat_table |
| 135 | * Desc : Given a base address and size, it identifies the indices within |
| 136 | * different level XLAT tables which map the given base addr. Similar to table |
| 137 | * walk, except that all invalid entries during the walk are updated |
| 138 | * accordingly. On success, it returns the size of the block/page addressed by |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 139 | * the final table. |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 140 | */ |
| 141 | static uint64_t init_xlat_table(uint64_t base_addr, |
| 142 | uint64_t size, |
| 143 | uint64_t tag) |
| 144 | { |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 145 | uint64_t l1_index = (base_addr & L1_ADDR_MASK) >> L1_ADDR_SHIFT; |
| 146 | uint64_t l2_index = (base_addr & L2_ADDR_MASK) >> L2_ADDR_SHIFT; |
| 147 | uint64_t l3_index = (base_addr & L3_ADDR_MASK) >> L3_ADDR_SHIFT; |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 148 | uint64_t *table = (uint64_t *)_ttb; |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 149 | uint64_t desc; |
| 150 | uint64_t attr = get_block_attr(tag); |
| 151 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 152 | /* L1 table lookup |
| 153 | * If VA has bits more than L2 can resolve, lookup starts at L1 |
| 154 | * Assumption: we don't need L0 table in coreboot */ |
Jimmy Huang | dea4597 | 2015-04-13 20:28:38 +0800 | [diff] [blame] | 155 | if (BITS_PER_VA > L1_ADDR_SHIFT) { |
| 156 | if ((size >= L1_XLAT_SIZE) && |
| 157 | IS_ALIGNED(base_addr, (1UL << L1_ADDR_SHIFT))) { |
| 158 | /* If block address is aligned and size is greater than |
| 159 | * or equal to size addressed by each L1 entry, we can |
| 160 | * directly store a block desc */ |
| 161 | desc = base_addr | BLOCK_DESC | attr; |
| 162 | table[l1_index] = desc; |
| 163 | /* L2 lookup is not required */ |
| 164 | return L1_XLAT_SIZE; |
Jimmy Huang | dea4597 | 2015-04-13 20:28:38 +0800 | [diff] [blame] | 165 | } |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 166 | table = get_next_level_table(&table[l1_index], L2_XLAT_SIZE); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 167 | } |
| 168 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 169 | /* L2 table lookup |
| 170 | * If lookup was performed at L1, L2 table addr is obtained from L1 desc |
| 171 | * else, lookup starts at ttbr address */ |
Jimmy Huang | dea4597 | 2015-04-13 20:28:38 +0800 | [diff] [blame] | 172 | if ((size >= L2_XLAT_SIZE) && |
| 173 | IS_ALIGNED(base_addr, (1UL << L2_ADDR_SHIFT))) { |
| 174 | /* If block address is aligned and size is greater than |
| 175 | * or equal to size addressed by each L2 entry, we can |
| 176 | * directly store a block desc */ |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 177 | desc = base_addr | BLOCK_DESC | attr; |
| 178 | table[l2_index] = desc; |
| 179 | /* L3 lookup is not required */ |
| 180 | return L2_XLAT_SIZE; |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 181 | } |
| 182 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 183 | /* L2 entry stores a table descriptor */ |
| 184 | table = get_next_level_table(&table[l2_index], L3_XLAT_SIZE); |
| 185 | |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 186 | /* L3 table lookup */ |
| 187 | desc = base_addr | PAGE_DESC | attr; |
| 188 | table[l3_index] = desc; |
| 189 | return L3_XLAT_SIZE; |
| 190 | } |
| 191 | |
| 192 | /* Func : sanity_check |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 193 | * Desc : Check address/size alignment of a table or page. |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 194 | */ |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 195 | static void sanity_check(uint64_t addr, uint64_t size) |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 196 | { |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 197 | assert(!(addr & GRANULE_SIZE_MASK) && |
| 198 | !(size & GRANULE_SIZE_MASK) && |
| 199 | size >= GRANULE_SIZE); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 200 | } |
| 201 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 202 | /* Func : mmu_config_range |
| 203 | * Desc : This function repeatedly calls init_xlat_table with the base |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 204 | * address. Based on size returned from init_xlat_table, base_addr is updated |
| 205 | * and subsequent calls are made for initializing the xlat table until the whole |
| 206 | * region is initialized. |
| 207 | */ |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 208 | void mmu_config_range(void *start, size_t size, uint64_t tag) |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 209 | { |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 210 | uint64_t base_addr = (uintptr_t)start; |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 211 | uint64_t temp_size = size; |
| 212 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 213 | printk(BIOS_INFO, "Mapping address range [%p:%p) as ", |
| 214 | start, start + size); |
| 215 | print_tag(BIOS_INFO, tag); |
Furquan Shaikh | 3553119 | 2015-05-20 17:10:55 -0700 | [diff] [blame] | 216 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 217 | sanity_check(base_addr, temp_size); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 218 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 219 | while (temp_size) |
| 220 | temp_size -= init_xlat_table(base_addr + (size - temp_size), |
| 221 | temp_size, tag); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 222 | |
Julius Werner | 6233681 | 2015-05-18 13:11:12 -0700 | [diff] [blame] | 223 | /* ARMv8 MMUs snoop L1 data cache, no need to flush it. */ |
| 224 | dsb(); |
| 225 | tlbiall_current(); |
| 226 | dsb(); |
| 227 | isb(); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 228 | } |
| 229 | |
| 230 | /* Func : mmu_init |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 231 | * Desc : Initialize MMU registers and page table memory region. This must be |
| 232 | * called exactly ONCE PER BOOT before trying to configure any mappings. |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 233 | */ |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 234 | void mmu_init(void) |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 235 | { |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 236 | /* Initially mark all table slots unused (first PTE == UNUSED_DESC). */ |
| 237 | uint64_t *table = (uint64_t *)_ttb; |
| 238 | for (; _ettb - (u8 *)table > 0; table += GRANULE_SIZE/sizeof(*table)) |
| 239 | table[0] = UNUSED_DESC; |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 240 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 241 | /* Initialize the root table (L1) to be completely unmapped. */ |
| 242 | uint64_t *root = setup_new_table(INVALID_DESC, L1_XLAT_SIZE); |
| 243 | assert((u8 *)root == _ttb); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 244 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 245 | /* Initialize TTBR */ |
| 246 | raw_write_ttbr0_el3((uintptr_t)root); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 247 | |
| 248 | /* Initialize MAIR indices */ |
| 249 | raw_write_mair_el3(MAIR_ATTRIBUTES); |
| 250 | |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 251 | /* Initialize TCR flags */ |
| 252 | raw_write_tcr_el3(TCR_TOSZ | TCR_IRGN0_NM_WBWAC | TCR_ORGN0_NM_WBWAC | |
Jimmy Huang | dea4597 | 2015-04-13 20:28:38 +0800 | [diff] [blame] | 253 | TCR_SH0_IS | TCR_TG0_4KB | TCR_PS_64GB | |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 254 | TCR_TBI_USED); |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 255 | } |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 256 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 257 | void mmu_enable(void) |
| 258 | { |
| 259 | uint32_t sctlr = raw_read_sctlr_el3(); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 260 | sctlr |= SCTLR_C | SCTLR_M | SCTLR_I; |
| 261 | raw_write_sctlr_el3(sctlr); |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 262 | isb(); |
| 263 | } |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 264 | |
Julius Werner | fe4cbf1 | 2015-10-07 18:38:24 -0700 | [diff] [blame] | 265 | /* |
| 266 | * CAUTION: This implementation assumes that coreboot never uses non-identity |
| 267 | * page tables for pages containing executed code. If you ever want to violate |
| 268 | * this assumption, have fun figuring out the associated problems on your own. |
| 269 | */ |
| 270 | void mmu_disable(void) |
| 271 | { |
| 272 | flush_dcache_all(DCCISW); |
| 273 | uint32_t sctlr = raw_read_sctlr_el3(); |
| 274 | sctlr &= ~(SCTLR_C | SCTLR_M); |
| 275 | raw_write_sctlr_el3(sctlr); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 276 | isb(); |
Furquan Shaikh | 2486957 | 2014-07-17 11:36:08 -0700 | [diff] [blame] | 277 | } |