Patrick Georgi | 1bd3050 | 2015-01-26 20:17:49 +0100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the libpayload project. |
| 3 | * |
| 4 | * Copyright (C) 2015 Google Inc. |
| 5 | * |
| 6 | * Redistribution and use in source and binary forms, with or without |
| 7 | * modification, are permitted provided that the following conditions |
| 8 | * are met: |
| 9 | * 1. Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * 2. Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
| 14 | * 3. The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
| 16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
| 18 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 19 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 20 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
| 21 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 22 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| 23 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| 24 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 25 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 26 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
| 27 | * SUCH DAMAGE. |
| 28 | */ |
| 29 | |
| 30 | #ifndef __CHIPIDEA_PRIV_H__ |
| 31 | #define __CHIPIDEA_PRIV_H__ |
| 32 | |
| 33 | #include <queue.h> |
| 34 | |
| 35 | struct chipidea_opreg { |
| 36 | uint8_t pad0[0x130]; |
| 37 | uint32_t usbcmd; // 0x130 |
| 38 | uint32_t usbsts; // 0x134 |
| 39 | uint32_t pad138[3]; |
| 40 | uint32_t usbadr; // 0x144 |
| 41 | /* 31:25: address |
| 42 | * 24: staging: 1 -> commit new address after |
| 43 | * next ctrl-in on ep0 |
| 44 | */ |
| 45 | uint32_t epbase; // 0x148 |
| 46 | uint32_t pad14c[10]; |
| 47 | uint32_t portsc; // 0x174 |
| 48 | uint32_t pad178[15]; |
| 49 | uint32_t devlc; // 0x1b4 |
| 50 | /* 25:26: host-desired usb version |
| 51 | * 23: force full speed */ |
| 52 | uint32_t pad1b8[16]; |
| 53 | uint32_t usbmode; // 0x1f8 |
| 54 | /* 0:1: 2 -> device mode */ |
| 55 | uint32_t pad1fc[3]; |
| 56 | uint32_t epsetupstat; // 0x208 |
| 57 | /* 0:15: 1 -> epX received setup packet */ |
| 58 | uint32_t epprime; // 0x20c |
| 59 | /* 0:15: 1 -> rx buffer for epX (OUT) is primed |
| 60 | * (ie. ready for controller-side processing) |
| 61 | * 16:31: 1 -> tx buffer for ep(X-16) (IN/INTR) is primed |
| 62 | * (ie. ready for controller-side processing) |
| 63 | * |
| 64 | * controller will read new td from qh and process it, |
| 65 | * then set the bit to 0 |
| 66 | */ |
| 67 | uint32_t epflush; // 0x210 |
| 68 | /* 0:31: 1 -> flush buffer (as defined in epprime), |
| 69 | * so it's uninitialized again. |
| 70 | * controller resets to 0 when done |
| 71 | */ |
| 72 | uint32_t epstat; // 0x214 |
| 73 | /* 0:31: 1 -> command in epprime is done, EP is ready |
| 74 | * (which may be later than epprime reset) |
| 75 | */ |
| 76 | uint32_t epcomplete; // 0x218 |
| 77 | /* 0:15: 1 -> incoming out/setup packet for epX was handled. |
| 78 | * software should check QH state |
| 79 | * 16:31: 1 -> incoming intr/in packet for ep(X-16) was |
| 80 | * handled. software should check QH state |
| 81 | */ |
| 82 | uint32_t epctrl[16]; // 0x21c |
| 83 | /* epctrl[0] is hardcoded as enabled control endpoint. |
| 84 | * TXS/RXS for stalling can be written. |
| 85 | * |
| 86 | * 23: TXE tx endpoint enable |
| 87 | * 22: TXR reset tx data toggle (for every configuration event) |
| 88 | * 18:19: 0=ctrl, 1=isoc, 2=bulk, 3=intr endpoint |
| 89 | * 16: TXS stall tx |
| 90 | * |
| 91 | * 7: RXE rx endpoint enable |
| 92 | * 6: RXR reset rx data toggle (for every configuration event) |
| 93 | * 2:3: endpoint type (like 18:19) |
| 94 | * 0: RXS stall rx |
| 95 | */ |
| 96 | uint32_t pad25c[0x69]; // 0x25c |
| 97 | uint32_t susp_ctrl; // 0x400 |
| 98 | }; |
| 99 | |
| 100 | #define CI_PDATA(ctrl) ((struct chipidea_pdata *)((ctrl)->pdata)) |
| 101 | #define CI_QHELEMENTS 32 |
| 102 | |
| 103 | #define QH_NO_AUTO_ZLT (1 << 29) /* no automatic ZLT handling by chipset */ |
| 104 | #define QH_MPS(x) ((x) << 16) |
| 105 | #define QH_IOS (1 << 15) /* IRQ on setup */ |
| 106 | |
| 107 | #define TD_INFO_LEN(x) ((x) << 16) |
| 108 | #define TD_INFO_IOC (1 << 15) |
| 109 | #define TD_INFO_ACTIVE (1 << 7) |
| 110 | #define TD_TERMINATE 1 |
| 111 | |
| 112 | #define USBCMD_8MICRO (8 << 16) |
| 113 | #define USBCMD_RST 2 |
| 114 | #define USBCMD_RUN 1 |
| 115 | |
| 116 | #define USBSTS_SLI (1 << 8) |
| 117 | #define USBSTS_URI (1 << 6) |
| 118 | #define USBSTS_PCI (1 << 2) |
| 119 | #define USBSTS_UEI (1 << 1) |
| 120 | #define USBSTS_UI (1 << 0) |
| 121 | |
| 122 | #define DEVLC_HOSTSPEED(x) (x << 25) |
| 123 | #define DEVLC_HOSTSPEED_MASK DEVLC_HOSTSPEED(3) |
| 124 | |
| 125 | struct td { |
| 126 | /* points to next td */ |
| 127 | uint32_t next; |
| 128 | uint32_t info; |
| 129 | /* page0..4 are like EHCI pages: up to 4k each |
| 130 | * page0 from addr to page end, page4 to its length |
| 131 | */ |
| 132 | uint32_t page0; |
| 133 | uint32_t page1; |
| 134 | uint32_t page2; |
| 135 | uint32_t page3; |
| 136 | uint32_t page4; |
| 137 | uint32_t res; |
| 138 | }; |
| 139 | |
| 140 | struct qh { |
| 141 | uint32_t config; |
| 142 | uint32_t current; |
| 143 | struct td td; |
| 144 | /* contains the data of a setup request */ |
| 145 | uint8_t setup_data[8]; |
| 146 | uint32_t res[4]; |
| 147 | }; |
| 148 | |
| 149 | struct job { |
| 150 | SIMPLEQ_ENTRY(job) queue; // linkage |
| 151 | struct td *tds; // for later free()ing |
| 152 | int td_count; |
| 153 | void *data; |
| 154 | size_t length; |
| 155 | int zlp; // append zero length packet? |
| 156 | int autofree; // free after processing? |
| 157 | }; |
| 158 | |
| 159 | SIMPLEQ_HEAD(job_queue, job); |
| 160 | |
| 161 | struct chipidea_pdata { |
| 162 | struct chipidea_opreg *opreg; |
| 163 | struct qh *qhlist; |
| 164 | struct job_queue job_queue[16][2]; |
| 165 | int ep_busy[16][2]; |
| 166 | }; |
| 167 | |
| 168 | #endif |