blob: f75f316b951485b60e32a7286b281f78bc2422be [file] [log] [blame]
Matt DeVillier54e0fd22020-10-29 20:30:08 -05001config BOARD_PURISM_BASEBOARD_LIBREM_CNL
Matt DeVillierceb409a2020-06-26 00:21:39 -05002 def_bool n
3 select BOARD_ROMSIZE_KB_16384
4 select DRIVERS_GENERIC_CBFS_SERIAL
5 select DRIVERS_USB_ACPI
6 select HAVE_ACPI_RESUME
7 select HAVE_ACPI_TABLES
8 select INTEL_GMA_HAVE_VBT
Angel Pons14ea5a02020-10-21 13:25:55 +02009 select MAINBOARD_HAS_LIBGFXINIT
Matt DeVillierceb409a2020-06-26 00:21:39 -050010 select NO_UART_ON_SUPERIO
Matt DeVillierceb409a2020-06-26 00:21:39 -050011 select SOC_INTEL_COMMON_BLOCK_HDA_VERB
Matt DeVillier087c4f22020-12-02 15:35:34 -060012 select SPD_CACHE_IN_FMAP
Matt DeVillierceb409a2020-06-26 00:21:39 -050013 select SPD_READ_BY_WORD
14 select USE_LEGACY_8254_TIMER
15
Felix Singer0be8ac52023-05-08 19:09:11 +020016config BOARD_PURISM_LIBREM_MINI
17 select BOARD_PURISM_BASEBOARD_LIBREM_CNL
Jonathon Halla4f701e2022-12-20 11:22:35 -050018 select HAVE_CMOS_DEFAULT
19 select HAVE_OPTION_TABLE
Felix Singer0be8ac52023-05-08 19:09:11 +020020 select SOC_INTEL_WHISKEYLAKE
21 select SUPERIO_ITE_IT8528E
22
23config BOARD_PURISM_LIBREM_MINI_V2
24 select BOARD_PURISM_BASEBOARD_LIBREM_CNL
Jonathon Halla4f701e2022-12-20 11:22:35 -050025 select HAVE_CMOS_DEFAULT
26 select HAVE_OPTION_TABLE
Felix Singer0be8ac52023-05-08 19:09:11 +020027 select SOC_INTEL_COMETLAKE_1
28 select SUPERIO_ITE_IT8528E
29
30config BOARD_PURISM_LIBREM_14
31 select BOARD_PURISM_BASEBOARD_LIBREM_CNL
32 select DRIVERS_I2C_HID
33 select EC_LIBREM_EC
34 select MEMORY_MAPPED_TPM
35 select MAINBOARD_HAS_TPM1
Jonathon Hall960209e2023-09-27 13:08:35 -040036 select SOC_INTEL_COMETLAKE_1_2
Felix Singer0be8ac52023-05-08 19:09:11 +020037 select SYSTEM_TYPE_LAPTOP
38
Matt DeVillier54e0fd22020-10-29 20:30:08 -050039if BOARD_PURISM_BASEBOARD_LIBREM_CNL
Matt DeVillierceb409a2020-06-26 00:21:39 -050040
41config MAINBOARD_DIR
Matt DeVillier54e0fd22020-10-29 20:30:08 -050042 default "purism/librem_cnl"
Matt DeVillierceb409a2020-06-26 00:21:39 -050043
44config MAINBOARD_FAMILY
45 string
Matt DeVillier12d515d2020-11-02 17:19:53 -060046 default "Librem Mini" if BOARD_PURISM_LIBREM_MINI || BOARD_PURISM_LIBREM_MINI_V2
Matt DeVillier4c3851a2020-11-17 14:17:06 -060047 default "Librem 14" if BOARD_PURISM_LIBREM_14
Matt DeVillierceb409a2020-06-26 00:21:39 -050048
49config MAINBOARD_PART_NUMBER
Matt DeVillierceb409a2020-06-26 00:21:39 -050050 default "Librem Mini" if BOARD_PURISM_LIBREM_MINI
Matt DeVillier12d515d2020-11-02 17:19:53 -060051 default "Librem Mini v2" if BOARD_PURISM_LIBREM_MINI_V2
Matt DeVillier4c3851a2020-11-17 14:17:06 -060052 default "Librem 14" if BOARD_PURISM_LIBREM_14
Matt DeVillierceb409a2020-06-26 00:21:39 -050053
54config VARIANT_DIR
Matt DeVillier12d515d2020-11-02 17:19:53 -060055 default "librem_mini" if BOARD_PURISM_LIBREM_MINI || BOARD_PURISM_LIBREM_MINI_V2
Matt DeVillier4c3851a2020-11-17 14:17:06 -060056 default "librem_14" if BOARD_PURISM_LIBREM_14
Matt DeVillierceb409a2020-06-26 00:21:39 -050057
Matt DeVillier77c86aa2022-06-15 15:31:24 -050058config OVERRIDE_DEVICETREE
59 default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
Matt DeVillierbf355e72020-10-29 20:37:56 -050060
Matt DeVillierceb409a2020-06-26 00:21:39 -050061config CBFS_SIZE
Matt DeVillierbf355e72020-10-29 20:37:56 -050062 default 0x800000 if BOARD_PURISM_LIBREM_MINI
Matt DeVillier12d515d2020-11-02 17:19:53 -060063 default 0xA00000 if BOARD_PURISM_LIBREM_MINI_V2
Matt DeVillier4c3851a2020-11-17 14:17:06 -060064 default 0x900000 if BOARD_PURISM_LIBREM_14
Matt DeVillierceb409a2020-06-26 00:21:39 -050065
Matt DeVillierceb409a2020-06-26 00:21:39 -050066config DIMM_MAX
Matt DeVillierceb409a2020-06-26 00:21:39 -050067 default 2
68
69config DIMM_SPD_SIZE
Matt DeVillierceb409a2020-06-26 00:21:39 -050070 default 512
71
72config VGA_BIOS_ID
73 string
Matt DeVillierbf355e72020-10-29 20:37:56 -050074 default "8086,3ea0" if BOARD_PURISM_LIBREM_MINI
Matt DeVillier4c3851a2020-11-17 14:17:06 -060075 default "8086,9b41" if BOARD_PURISM_LIBREM_MINI_V2 || BOARD_PURISM_LIBREM_14
Matt DeVillierceb409a2020-06-26 00:21:39 -050076
77config PXE_ROM_ID
78 string
79 default "10ec,8168"
80
81# This platform has limited means to display POST codes
82config NO_POST
83 default y
84
85endif
Jonathon Hallaeb8b3d2022-10-18 16:33:27 -040086
Jonathon Halla23ec072023-05-01 10:10:00 -040087if BOARD_PURISM_LIBREM_MINI || BOARD_PURISM_LIBREM_MINI_V2
88
89config PC_CMOS_BASE_PORT_BANK1
90 default 0x360
91
Jonathon Halla4f701e2022-12-20 11:22:35 -050092config CMOS_LAYOUT_FILE
93 default "src/mainboard/\$(MAINBOARDDIR)/variants/librem_mini/cmos.layout"
94
95config CMOS_DEFAULT_FILE
96 default "src/mainboard/\$(MAINBOARDDIR)/variants/librem_mini/cmos.default"
97
Jonathon Halla23ec072023-05-01 10:10:00 -040098endif
99
Jonathon Hallaeb8b3d2022-10-18 16:33:27 -0400100config ENABLE_EC_UART1
101 bool "Enable EC UART1"
102 depends on BOARD_PURISM_LIBREM_MINI || BOARD_PURISM_LIBREM_MINI_V2
103 default n
104 select DRIVERS_UART_8250IO
105 help
106 Enable UART1 on the EC.
107
108 This UART can be used for boot logging by coreboot, SeaBIOS, or
109 Linux. It also works as a general-purpose UART.
110
111 Soldering is required to access these signals. Locate the pads for
112 U81 on the bottom of the board near the front edge; the IC is not
113 populated. TX is pin 14, RX is pin 19. The signals are 3.3V (do NOT
114 connect directly to an RS-232 serial port).