blob: 5419d71e1af554267dc40757c3c1abe66797a84b [file] [log] [blame]
Sven Schnelled8129f92011-04-20 09:12:17 +00001##
2## This file is part of the coreboot project.
3##
4## Copyright (C) 2007-2009 coresystems GmbH
5## Copyright (C) 2011 Sven Schnelle <svens@stackframe.org>
6##
7## This program is free software; you can redistribute it and/or
8## modify it under the terms of the GNU General Public License as
9## published by the Free Software Foundation; version 2 of
10## the License.
11##
12## This program is distributed in the hope that it will be useful,
13## but WITHOUT ANY WARRANTY; without even the implied warranty of
14## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15## GNU General Public License for more details.
16##
17## You should have received a copy of the GNU General Public License
18## along with this program; if not, write to the Free Software
19## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
20## MA 02110-1301 USA
21##
22
23chip northbridge/intel/i945
24
25 device lapic_cluster 0 on
26 chip cpu/intel/socket_mFCPGA478
27 device lapic 0 on end
28 end
29 end
30
31 device pci_domain 0 on
32 device pci 00.0 on # Host bridge
33 subsystemid 0x17aa 0x2015
34 end
35 device pci 01.0 on # PCI-e
36 device pci 00.0 on # VGA
37 subsystemid 0x17aa 0x20a4
38 end
39 end
40
41 device pci 02.0 on # GMA Graphics controller
42 subsystemid 0x17aa 0x201a
43 end
44 device pci 02.1 on # display controller
45 subsystemid 0x17aa 0x201a
46 end
47
48 chip southbridge/intel/i82801gx
49 register "pirqa_routing" = "0x0b"
50 register "pirqb_routing" = "0x0b"
51 register "pirqc_routing" = "0x0b"
52 register "pirqd_routing" = "0x0b"
53 register "pirqe_routing" = "0x0b"
54 register "pirqf_routing" = "0x0b"
55 register "pirqg_routing" = "0x0b"
56 register "pirqh_routing" = "0x0b"
57
58 # GPI routing
59 # 0 No effect (default)
60 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
61 # 2 SCI (if corresponding GPIO_EN bit is also set)
62 register "gpi13_routing" = "2"
63 register "gpi12_routing" = "2"
64 register "gpi8_routing" = "2"
65
66 register "sata_ahci" = "0x0"
67
68 register "gpe0_en" = "0x11000006"
69
70 device pci 1b.0 on # Audio Cnotroller
71 subsystemid 0x17aa 0x2010
72 end
73 device pci 1c.0 on # Ethernet
74 subsystemid 0x17aa 0x2001
75 end
76 device pci 1c.1 on end # WLAN
77 device pci 1d.0 on # USB UHCI
78 subsystemid 0x17aa 0x200a
79 end
80 device pci 1d.1 on # USB UHCI
81 subsystemid 0x17aa 0x200a
82 end
83 device pci 1d.2 on # USB UHCI
84 subsystemid 0x17aa 0x200a
85 end
86 device pci 1d.3 on # USB UHCI
87 subsystemid 0x17aa 0x200a
88 end
89 device pci 1d.7 on # USB2 EHCI
90 subsystemid 0x17aa 0x200b
91 end
92 device pci 1e.0 on # PCI Bridge
93 chip southbridge/ti/pci1x2x
94 device pci 00.0 on
95 subsystemid 0x17aa 0x2012
96 end
97 register "scr" = "0x0844d070"
98 register "mrr" = "0x01d01002"
99
100 end
101 end
102 device pci 1f.0 on # PCI-LPC bridge
103 subsystemid 0x17aa 0x2009
104 chip ec/lenovo/pmh7
105 device pnp ff.1 on # dummy
106 end
107
108 register "backlight_enable" = "0x01"
109 register "dock_event_enable" = "0x01"
110 end
111 chip ec/lenovo/h8
112 device pnp ff.2 on # dummy
113 io 0x60 = 0x62
114 io 0x62 = 0x66
115 io 0x64 = 0x1600
116 io 0x66 = 0x1604
117 end
118
119
120 register "config0" = "0xa6"
121 register "config1" = "0x05"
122 register "config2" = "0xa0"
123 register "config3" = "0x05"
124
125 register "beepmask0" = "0xfe"
126 register "beepmask1" = "0x96"
127
128 register "event2_enable" = "0xff"
129 register "event3_enable" = "0xff"
130 register "event4_enable" = "0xf4"
131 register "event5_enable" = "0x3c"
132 register "event6_enable" = "0x80"
Sven Schnelle95ebe662011-04-28 09:29:06 +0000133 register "eventc_enable" = "0x3c"
Sven Schnelled8129f92011-04-20 09:12:17 +0000134
135 register "wlan_enable" = "0x01"
136 register "trackpoint_enable" = "0x03"
137
138 end
139 chip superio/nsc/pc87382
140 device pnp 164e.2 on # IR
141 io 0x60 = 0x2f8
142 end
143
144 device pnp 164e.3 off # Serial Port
145 io 0x60 = 0x3f8
146 end
147
148 device pnp 164e.7 on # GPIO
149 io 0x60 = 0x1680
150 end
151
152 device pnp 164e.19 on # DLPC
153 io 0x60 = 0x164c
154 end
155 end
156
157 chip superio/nsc/pc87384
158 device pnp 2e.0 off #FDC
159 end
160
161 device pnp 2e.1 on # Parallel Port
162 io 0x60 = 0x3bc
163 irq 0x70 = 7
164 end
165
166 device pnp 2e.2 off # Serial Port / IR
167 io 0x60 = 0x2f8
168 irq 0x70 = 4
169 end
170
171 device pnp 2e.3 on # Serial Port
172 io 0x60 = 0x3f8
173 irq 0x70 = 4
174 end
175
176 device pnp 2e.7 on # GPIO
177 io 0x60 = 0x1620
178 end
179
180 device pnp 2e.a off # WDT
181 end
182 end
183 end
Sven Schnelleedabf542011-04-27 19:47:49 +0000184 device pci 1f.1 on # IDE
Sven Schnelled8129f92011-04-20 09:12:17 +0000185 subsystemid 0x17aa 0x200c
186 end
187 device pci 1f.2 on # SATA
188 subsystemid 0x17aa 0x200d
189 end
190 device pci 1f.3 on # SMBUS
191 subsystemid 0x17aa 0x200f
192 end
193 end
194 end
195end