Felix Held | 95f1bb8 | 2021-05-07 18:46:36 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #ifndef AMD_COMMON_ALIB_H |
| 4 | #define AMD_COMMON_ALIB_H |
| 5 | |
| 6 | #define ALIB_FUNCTION_REPORT_AC_DC_STATE 0x1 |
| 7 | #define ALIB_FUNCTION_DYNAMIC_POWER_THERMAL_CONFIG 0xc |
| 8 | |
Felix Held | 3acafa2 | 2021-05-07 19:17:51 +0200 | [diff] [blame] | 9 | #ifndef __ACPI__ |
| 10 | |
| 11 | /* parameter IDs for the ALIB_FUNCTION_DYNAMIC_POWER_THERMAL_CONFIG function */ |
| 12 | enum alib_dptc_parameter_ids { |
| 13 | ALIB_DPTC_THERMAL_CONTROL_LIMIT_ID = 0x3, |
| 14 | ALIB_DPTC_SUSTAINED_POWER_LIMIT_ID = 0x5, |
| 15 | ALIB_DPTC_FAST_PPT_LIMIT_ID = 0x6, |
| 16 | ALIB_DPTC_SLOW_PPT_LIMIT_ID = 0x7, |
Tim Van Patten | 8076647 | 2022-08-29 12:32:49 -0600 | [diff] [blame] | 17 | ALIB_DPTC_SLOW_PPT_TIME_CONSTANT_ID = 0x8, |
| 18 | ALIB_DPTC_PROCHOT_L_DEASSERTION_RAMP_TIME_ID = 0x9, |
| 19 | ALIB_DPTC_VRM_CURRENT_LIMIT_ID = 0xb, |
| 20 | ALIB_DPTC_VRM_MAXIMUM_CURRENT_LIMIT = 0xc, |
| 21 | /* Picasso: SetVrmSocCurrentLimit (0xe) is not implemented in alib. */ |
| 22 | ALIB_DPTC_VRM_SOC_CURRENT_LIMIT_ID = 0xe, |
Felix Held | 3acafa2 | 2021-05-07 19:17:51 +0200 | [diff] [blame] | 23 | }; |
| 24 | |
Felix Held | f061017 | 2021-05-07 19:21:08 +0200 | [diff] [blame] | 25 | struct alib_dptc_param { |
| 26 | uint8_t id; |
| 27 | uint32_t value; |
| 28 | } __packed; |
| 29 | |
Tim Van Patten | 9244358 | 2022-08-23 16:06:33 -0600 | [diff] [blame^] | 30 | void acpigen_write_alib_dptc_default(uint8_t *default_param, size_t default_param_len); |
| 31 | void acpigen_write_alib_dptc_tablet(uint8_t *tablet_param, size_t tablet_param_len); |
Felix Held | 18b51e9 | 2021-05-08 01:30:30 +0200 | [diff] [blame] | 32 | |
Felix Held | 3acafa2 | 2021-05-07 19:17:51 +0200 | [diff] [blame] | 33 | #endif /* !__ACPI__ */ |
| 34 | |
Felix Held | 95f1bb8 | 2021-05-07 18:46:36 +0200 | [diff] [blame] | 35 | #endif /* AMD_COMMON_ALIB_H */ |