| Kyösti Mälkki | 9116270 | 2011-11-03 15:22:01 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Kyösti Mälkki <kyosti.malkki@gmail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | /* PCI-X devices 04:04.0 and 04:04.1 : AIC-7902W |
| 21 | * U320 SCSI dual-channel controller |
| 22 | */ |
| 23 | |
| 24 | Device (SCS0) |
| 25 | { |
| 26 | Name (_ADR, 0x00040000) |
| 27 | OperationRegion (SCSC, PCI_Config, 0x00, 0x0100) |
| 28 | Field (SCSC, ByteAcc, NoLock, Preserve) |
| 29 | { |
| 30 | Offset (0x2C), SID, 32, |
| 31 | Offset (0xE0), PMC, 8, |
| 32 | Offset (0xFF), IDW, 8 |
| 33 | } |
| 34 | } |
| 35 | |
| 36 | Device (SCS1) |
| 37 | { |
| 38 | Name (_ADR, 0x00040001) |
| 39 | OperationRegion (SCSC, PCI_Config, 0x00, 0x0100) |
| 40 | Field (SCSC, ByteAcc, NoLock, Preserve) |
| 41 | { |
| 42 | Offset (0x2C), SID, 32, |
| 43 | Offset (0xE0), PMC, 8, |
| 44 | Offset (0xFF), IDW, 8 |
| 45 | } |
| 46 | } |
| 47 | |
| 48 | #if 0 |
| 49 | /* Set subsystem id for both SCSI devices. |
| 50 | * It may require some delay on wake-up before this can be done. |
| 51 | */ |
| 52 | Method ( ) |
| 53 | { |
| 54 | Or (\_SB.PCI0.HLIB.P64A.SCS0.IDW, 0x01, \_SB.PCI0.HLIB.P64A.SCS0.IDW) |
| 55 | Store (0x1106A0A0, \_SB.PCI0.HLIB.P64A.SCS0.SID) |
| 56 | And (\_SB.PCI0.HLIB.P64A.SCS0.IDW, 0xFE, \_SB.PCI0.HLIB.P64A.SCS0.IDW) |
| 57 | |
| 58 | Or (\_SB.PCI0.HLIB.P64A.SCS1.IDW, 0x01, \_SB.PCI0.HLIB.P64A.SCS1.IDW) |
| 59 | Store (0x1106A0A0, \_SB.PCI0.HLIB.P64A.SCS1.SID) |
| 60 | And (\_SB.PCI0.HLIB.P64A.SCS1.IDW, 0xFE, \_SB.PCI0.HLIB.P64A.SCS1.IDW) |
| 61 | } |
| 62 | #endif |
| 63 | |