Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Martin Roth | 8fc6881 | 2023-08-18 16:28:29 -0600 | [diff] [blame^] | 3 | #ifndef AMD_COMMON_PSP_TRANSFER_H |
| 4 | #define AMD_COMMON_PSP_TRANSFER_H |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 5 | |
Martin Roth | 50cca76 | 2020-08-13 11:06:18 -0600 | [diff] [blame] | 6 | # if (CONFIG_CMOS_RECOVERY_BYTE != 0) |
| 7 | # define CMOS_RECOVERY_BYTE CONFIG_CMOS_RECOVERY_BYTE |
| 8 | # elif CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) |
| 9 | # error "Must set CONFIG_CMOS_RECOVERY_BYTE" |
| 10 | # endif |
| 11 | |
Kangheui Won | 6b36c83 | 2021-04-21 14:48:14 +1000 | [diff] [blame] | 12 | #define CMOS_RECOVERY_MAGIC_VAL 0x96 |
Martin Roth | 50cca76 | 2020-08-13 11:06:18 -0600 | [diff] [blame] | 13 | |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 14 | #define TRANSFER_INFO_SIZE 64 |
| 15 | #define TIMESTAMP_BUFFER_SIZE 0x200 |
| 16 | |
| 17 | #define TRANSFER_MAGIC_VAL 0x50544953 |
| 18 | |
Kangheui Won | f299632 | 2021-04-15 14:19:47 +1000 | [diff] [blame] | 19 | /* Bit definitions for the psp_info field in the PSP transfer_info_struct */ |
| 20 | #define PSP_INFO_PRODUCTION_MODE 0x00000001UL |
| 21 | #define PSP_INFO_PRODUCTION_SILICON 0x00000002UL |
| 22 | #define PSP_INFO_VALID 0x80000000UL |
| 23 | |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 24 | /* Area for things that would cause errors in a linker script */ |
| 25 | #if !defined(__ASSEMBLER__) |
| 26 | #include <stdint.h> |
| 27 | |
| 28 | struct transfer_info_struct { |
| 29 | uint32_t magic_val; /* Identifier */ |
| 30 | uint32_t struct_bytes; /* Size of this structure */ |
| 31 | uint32_t buffer_size; /* Size of the transfer buffer area */ |
| 32 | |
| 33 | /* Offsets from start of transfer buffer */ |
| 34 | uint32_t workbuf_offset; |
| 35 | uint32_t console_offset; |
| 36 | uint32_t timestamp_offset; |
| 37 | uint32_t fmap_offset; |
Martin Roth | 60d89e2 | 2020-09-28 14:29:17 -0600 | [diff] [blame] | 38 | |
| 39 | uint32_t unused1[5]; |
| 40 | |
| 41 | /* Fields reserved for the PSP */ |
| 42 | uint64_t timestamp; /* Offset 0x30 */ |
| 43 | uint32_t psp_unused; /* Offset 0x38 */ |
| 44 | uint32_t psp_info; /* Offset 0x3C */ |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 45 | }; |
| 46 | |
Kangheui Won | 6b36c83 | 2021-04-21 14:48:14 +1000 | [diff] [blame] | 47 | _Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE, |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 48 | "TRANSFER_INFO_SIZE is incorrect"); |
Martin Roth | 4b34193 | 2020-10-06 15:29:28 -0600 | [diff] [blame] | 49 | |
| 50 | /* Make sure the PSP transferred information over to x86 side. */ |
Raul E Rangel | fe1418d | 2022-02-24 12:36:38 -0700 | [diff] [blame] | 51 | int transfer_buffer_valid(const struct transfer_info_struct *ptr); |
| 52 | /* Verify vboot work buffer is valid in transfer buffer */ |
Martin Roth | 4b34193 | 2020-10-06 15:29:28 -0600 | [diff] [blame] | 53 | void verify_psp_transfer_buf(void); |
Martin Roth | 0f3ef70 | 2020-10-06 18:11:12 -0600 | [diff] [blame] | 54 | /* Display the transfer block's PSP_info data */ |
| 55 | void show_psp_transfer_info(void); |
Raul E Rangel | fe1418d | 2022-02-24 12:36:38 -0700 | [diff] [blame] | 56 | /* Replays the pre-x86 cbmem console into the x86 cbmem console */ |
Raul E Rangel | 08de3e3 | 2022-02-25 17:10:09 -0700 | [diff] [blame] | 57 | void replay_transfer_buffer_cbmemc(void); |
Felix Held | cd50715 | 2020-11-24 20:37:15 +0100 | [diff] [blame] | 58 | /* Called by bootblock_c_entry in the VBOOT_STARTS_BEFORE_BOOTBLOCK case */ |
| 59 | void boot_with_psp_timestamp(uint64_t base_timestamp); |
Martin Roth | 4b34193 | 2020-10-06 15:29:28 -0600 | [diff] [blame] | 60 | |
Martin Roth | 0c12abe | 2020-06-26 08:40:56 -0600 | [diff] [blame] | 61 | #endif |
| 62 | |
Martin Roth | 8fc6881 | 2023-08-18 16:28:29 -0600 | [diff] [blame^] | 63 | #endif /* AMD_COMMON_PSP_TRANSFER_H */ |