Angel Pons | 0612b27 | 2020-04-05 15:46:56 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 2 | |
| 3 | #include <console/console.h> |
| 4 | #include <device/pci.h> |
| 5 | #include <device/pciexp.h> |
| 6 | #include <device/pci_def.h> |
| 7 | #include <device/pci_ids.h> |
Patrick Rudolph | e56189c | 2018-04-18 10:11:59 +0200 | [diff] [blame] | 8 | #include <device/pci_ops.h> |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 9 | |
| 10 | #define CACHE_LINE_SIZE 0x10 |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 11 | |
| 12 | static void pch_pcie_init(struct device *dev) |
| 13 | { |
| 14 | u16 reg16; |
| 15 | |
| 16 | printk(BIOS_DEBUG, "Initializing PCH PCIe bridge.\n"); |
| 17 | |
| 18 | /* Enable SERR */ |
| 19 | pci_or_config32(dev, PCI_COMMAND, PCI_COMMAND_SERR); |
| 20 | |
| 21 | /* Enable Bus Master */ |
| 22 | pci_or_config32(dev, PCI_COMMAND, PCI_COMMAND_MASTER); |
| 23 | |
| 24 | /* Set Cache Line Size to 0x10 */ |
| 25 | pci_write_config8(dev, PCI_CACHE_LINE_SIZE, CACHE_LINE_SIZE); |
| 26 | |
Angel Pons | b82b431 | 2020-07-23 23:32:46 +0200 | [diff] [blame] | 27 | /* disable parity error response */ |
| 28 | pci_and_config16(dev, PCI_BRIDGE_CONTROL, ~PCI_BRIDGE_CTL_PARITY); |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 29 | |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 30 | if (CONFIG(PCIE_DEBUG_INFO)) { |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 31 | printk(BIOS_SPEW, " MBL = 0x%08x\n", |
| 32 | pci_read_config32(dev, PCI_MEMORY_BASE)); |
| 33 | printk(BIOS_SPEW, " PMBL = 0x%08x\n", |
| 34 | pci_read_config32(dev, PCI_PREF_MEMORY_BASE)); |
| 35 | printk(BIOS_SPEW, " PMBU32 = 0x%08x\n", |
| 36 | pci_read_config32(dev, PCI_PREF_BASE_UPPER32)); |
| 37 | printk(BIOS_SPEW, " PMLU32 = 0x%08x\n", |
| 38 | pci_read_config32(dev, PCI_PREF_LIMIT_UPPER32)); |
| 39 | } |
| 40 | |
| 41 | /* Clear errors in status registers */ |
| 42 | reg16 = pci_read_config16(dev, PCI_STATUS); |
| 43 | pci_write_config16(dev, PCI_STATUS, reg16); |
| 44 | reg16 = pci_read_config16(dev, PCI_SEC_STATUS); |
| 45 | pci_write_config16(dev, PCI_SEC_STATUS, reg16); |
| 46 | } |
| 47 | |
Nico Huber | 968ef75 | 2021-03-07 01:39:18 +0100 | [diff] [blame] | 48 | static void pcie_get_ltr_max_latencies(u16 *max_snoop, u16 *max_nosnoop) |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 49 | { |
Nico Huber | 968ef75 | 2021-03-07 01:39:18 +0100 | [diff] [blame] | 50 | *max_snoop = PCIE_LTR_MAX_SNOOP_LATENCY_3146US; |
| 51 | *max_nosnoop = PCIE_LTR_MAX_NO_SNOOP_LATENCY_3146US; |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 52 | } |
| 53 | |
| 54 | static struct pci_operations pcie_ops = { |
Nico Huber | 968ef75 | 2021-03-07 01:39:18 +0100 | [diff] [blame] | 55 | .get_ltr_max_latencies = pcie_get_ltr_max_latencies, |
Subrata Banik | 15ccbf0 | 2019-03-20 15:09:44 +0530 | [diff] [blame] | 56 | .set_subsystem = pci_dev_set_subsystem, |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 57 | }; |
| 58 | |
Nico Huber | 5768619 | 2022-08-06 19:11:55 +0200 | [diff] [blame] | 59 | struct device_operations pcie_rp_ops = { |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 60 | .read_resources = pci_bus_read_resources, |
| 61 | .set_resources = pci_dev_set_resources, |
| 62 | .enable_resources = pci_bus_enable_resources, |
| 63 | .init = pch_pcie_init, |
| 64 | .scan_bus = pciexp_scan_bridge, |
| 65 | .ops_pci = &pcie_ops, |
| 66 | }; |
| 67 | |
| 68 | static const unsigned short pcie_device_ids[] = { |
Bora Guvendik | a15b25f | 2022-02-28 14:43:49 -0800 | [diff] [blame] | 69 | PCI_DID_INTEL_RPL_P_PCIE_RP1, |
| 70 | PCI_DID_INTEL_RPL_P_PCIE_RP2, |
| 71 | PCI_DID_INTEL_RPL_P_PCIE_RP3, |
Wonkyu Kim | 9f40107 | 2020-11-13 15:16:32 -0800 | [diff] [blame] | 72 | PCI_DID_INTEL_MTL_SOC_PCIE_RP1, |
| 73 | PCI_DID_INTEL_MTL_SOC_PCIE_RP2, |
| 74 | PCI_DID_INTEL_MTL_SOC_PCIE_RP3, |
| 75 | PCI_DID_INTEL_MTL_SOC_PCIE_RP4, |
| 76 | PCI_DID_INTEL_MTL_SOC_PCIE_RP5, |
| 77 | PCI_DID_INTEL_MTL_SOC_PCIE_RP6, |
| 78 | PCI_DID_INTEL_MTL_SOC_PCIE_RP7, |
| 79 | PCI_DID_INTEL_MTL_SOC_PCIE_RP8, |
| 80 | PCI_DID_INTEL_MTL_SOC_PCIE_RP9, |
| 81 | PCI_DID_INTEL_MTL_IOE_P_PCIE_RP10, |
| 82 | PCI_DID_INTEL_MTL_IOE_P_PCIE_RP11, |
| 83 | PCI_DID_INTEL_MTL_IOE_P_PCIE_RP12, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 84 | PCI_DID_INTEL_LWB_PCIE_RP1, |
| 85 | PCI_DID_INTEL_LWB_PCIE_RP2, |
| 86 | PCI_DID_INTEL_LWB_PCIE_RP3, |
| 87 | PCI_DID_INTEL_LWB_PCIE_RP4, |
| 88 | PCI_DID_INTEL_LWB_PCIE_RP5, |
| 89 | PCI_DID_INTEL_LWB_PCIE_RP6, |
| 90 | PCI_DID_INTEL_LWB_PCIE_RP7, |
| 91 | PCI_DID_INTEL_LWB_PCIE_RP8, |
| 92 | PCI_DID_INTEL_LWB_PCIE_RP9, |
| 93 | PCI_DID_INTEL_LWB_PCIE_RP10, |
| 94 | PCI_DID_INTEL_LWB_PCIE_RP11, |
| 95 | PCI_DID_INTEL_LWB_PCIE_RP12, |
| 96 | PCI_DID_INTEL_LWB_PCIE_RP13, |
| 97 | PCI_DID_INTEL_LWB_PCIE_RP14, |
| 98 | PCI_DID_INTEL_LWB_PCIE_RP15, |
| 99 | PCI_DID_INTEL_LWB_PCIE_RP16, |
| 100 | PCI_DID_INTEL_LWB_PCIE_RP17, |
| 101 | PCI_DID_INTEL_LWB_PCIE_RP18, |
| 102 | PCI_DID_INTEL_LWB_PCIE_RP19, |
| 103 | PCI_DID_INTEL_LWB_PCIE_RP20, |
| 104 | PCI_DID_INTEL_LWB_PCIE_RP1_SUPER, |
| 105 | PCI_DID_INTEL_LWB_PCIE_RP2_SUPER, |
| 106 | PCI_DID_INTEL_LWB_PCIE_RP3_SUPER, |
| 107 | PCI_DID_INTEL_LWB_PCIE_RP4_SUPER, |
| 108 | PCI_DID_INTEL_LWB_PCIE_RP5_SUPER, |
| 109 | PCI_DID_INTEL_LWB_PCIE_RP6_SUPER, |
| 110 | PCI_DID_INTEL_LWB_PCIE_RP7_SUPER, |
| 111 | PCI_DID_INTEL_LWB_PCIE_RP8_SUPER, |
| 112 | PCI_DID_INTEL_LWB_PCIE_RP9_SUPER, |
| 113 | PCI_DID_INTEL_LWB_PCIE_RP10_SUPER, |
| 114 | PCI_DID_INTEL_LWB_PCIE_RP11_SUPER, |
| 115 | PCI_DID_INTEL_LWB_PCIE_RP12_SUPER, |
| 116 | PCI_DID_INTEL_LWB_PCIE_RP13_SUPER, |
| 117 | PCI_DID_INTEL_LWB_PCIE_RP14_SUPER, |
| 118 | PCI_DID_INTEL_LWB_PCIE_RP15_SUPER, |
| 119 | PCI_DID_INTEL_LWB_PCIE_RP16_SUPER, |
| 120 | PCI_DID_INTEL_LWB_PCIE_RP17_SUPER, |
| 121 | PCI_DID_INTEL_LWB_PCIE_RP18_SUPER, |
| 122 | PCI_DID_INTEL_LWB_PCIE_RP19_SUPER, |
| 123 | PCI_DID_INTEL_LWB_PCIE_RP20_SUPER, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 124 | PCI_DID_INTEL_CNL_LP_PCIE_RP1, |
| 125 | PCI_DID_INTEL_CNL_LP_PCIE_RP2, |
| 126 | PCI_DID_INTEL_CNL_LP_PCIE_RP3, |
| 127 | PCI_DID_INTEL_CNL_LP_PCIE_RP4, |
| 128 | PCI_DID_INTEL_CNL_LP_PCIE_RP5, |
| 129 | PCI_DID_INTEL_CNL_LP_PCIE_RP6, |
| 130 | PCI_DID_INTEL_CNL_LP_PCIE_RP7, |
| 131 | PCI_DID_INTEL_CNL_LP_PCIE_RP8, |
| 132 | PCI_DID_INTEL_CNL_LP_PCIE_RP9, |
| 133 | PCI_DID_INTEL_CNL_LP_PCIE_RP10, |
| 134 | PCI_DID_INTEL_CNL_LP_PCIE_RP11, |
| 135 | PCI_DID_INTEL_CNL_LP_PCIE_RP12, |
| 136 | PCI_DID_INTEL_CNL_LP_PCIE_RP13, |
| 137 | PCI_DID_INTEL_CNL_LP_PCIE_RP14, |
| 138 | PCI_DID_INTEL_CNL_LP_PCIE_RP15, |
| 139 | PCI_DID_INTEL_CNL_LP_PCIE_RP16, |
| 140 | PCI_DID_INTEL_CNP_H_PCIE_RP1, |
| 141 | PCI_DID_INTEL_CNP_H_PCIE_RP2, |
| 142 | PCI_DID_INTEL_CNP_H_PCIE_RP3, |
| 143 | PCI_DID_INTEL_CNP_H_PCIE_RP4, |
| 144 | PCI_DID_INTEL_CNP_H_PCIE_RP5, |
| 145 | PCI_DID_INTEL_CNP_H_PCIE_RP6, |
| 146 | PCI_DID_INTEL_CNP_H_PCIE_RP7, |
| 147 | PCI_DID_INTEL_CNP_H_PCIE_RP8, |
| 148 | PCI_DID_INTEL_CNP_H_PCIE_RP9, |
| 149 | PCI_DID_INTEL_CNP_H_PCIE_RP10, |
| 150 | PCI_DID_INTEL_CNP_H_PCIE_RP11, |
| 151 | PCI_DID_INTEL_CNP_H_PCIE_RP12, |
| 152 | PCI_DID_INTEL_CNP_H_PCIE_RP13, |
| 153 | PCI_DID_INTEL_CNP_H_PCIE_RP14, |
| 154 | PCI_DID_INTEL_CNP_H_PCIE_RP15, |
| 155 | PCI_DID_INTEL_CNP_H_PCIE_RP16, |
| 156 | PCI_DID_INTEL_CNP_H_PCIE_RP17, |
| 157 | PCI_DID_INTEL_CNP_H_PCIE_RP18, |
| 158 | PCI_DID_INTEL_CNP_H_PCIE_RP19, |
| 159 | PCI_DID_INTEL_CNP_H_PCIE_RP20, |
| 160 | PCI_DID_INTEL_CNP_H_PCIE_RP21, |
| 161 | PCI_DID_INTEL_CNP_H_PCIE_RP22, |
| 162 | PCI_DID_INTEL_CNP_H_PCIE_RP23, |
| 163 | PCI_DID_INTEL_CNP_H_PCIE_RP24, |
| 164 | PCI_DID_INTEL_ICP_LP_PCIE_RP1, |
| 165 | PCI_DID_INTEL_ICP_LP_PCIE_RP2, |
| 166 | PCI_DID_INTEL_ICP_LP_PCIE_RP3, |
| 167 | PCI_DID_INTEL_ICP_LP_PCIE_RP4, |
| 168 | PCI_DID_INTEL_ICP_LP_PCIE_RP5, |
| 169 | PCI_DID_INTEL_ICP_LP_PCIE_RP6, |
| 170 | PCI_DID_INTEL_ICP_LP_PCIE_RP7, |
| 171 | PCI_DID_INTEL_ICP_LP_PCIE_RP8, |
| 172 | PCI_DID_INTEL_ICP_LP_PCIE_RP9, |
| 173 | PCI_DID_INTEL_ICP_LP_PCIE_RP10, |
| 174 | PCI_DID_INTEL_ICP_LP_PCIE_RP11, |
| 175 | PCI_DID_INTEL_ICP_LP_PCIE_RP12, |
| 176 | PCI_DID_INTEL_ICP_LP_PCIE_RP13, |
| 177 | PCI_DID_INTEL_ICP_LP_PCIE_RP14, |
| 178 | PCI_DID_INTEL_ICP_LP_PCIE_RP15, |
| 179 | PCI_DID_INTEL_ICP_LP_PCIE_RP16, |
| 180 | PCI_DID_INTEL_CMP_LP_PCIE_RP1, |
| 181 | PCI_DID_INTEL_CMP_LP_PCIE_RP2, |
| 182 | PCI_DID_INTEL_CMP_LP_PCIE_RP3, |
| 183 | PCI_DID_INTEL_CMP_LP_PCIE_RP4, |
| 184 | PCI_DID_INTEL_CMP_LP_PCIE_RP5, |
| 185 | PCI_DID_INTEL_CMP_LP_PCIE_RP6, |
| 186 | PCI_DID_INTEL_CMP_LP_PCIE_RP7, |
| 187 | PCI_DID_INTEL_CMP_LP_PCIE_RP8, |
| 188 | PCI_DID_INTEL_CMP_LP_PCIE_RP9, |
| 189 | PCI_DID_INTEL_CMP_LP_PCIE_RP10, |
| 190 | PCI_DID_INTEL_CMP_LP_PCIE_RP11, |
| 191 | PCI_DID_INTEL_CMP_LP_PCIE_RP12, |
| 192 | PCI_DID_INTEL_CMP_LP_PCIE_RP13, |
| 193 | PCI_DID_INTEL_CMP_LP_PCIE_RP14, |
| 194 | PCI_DID_INTEL_CMP_LP_PCIE_RP15, |
| 195 | PCI_DID_INTEL_CMP_LP_PCIE_RP16, |
| 196 | PCI_DID_INTEL_CMP_H_PCIE_RP1, |
| 197 | PCI_DID_INTEL_CMP_H_PCIE_RP2, |
| 198 | PCI_DID_INTEL_CMP_H_PCIE_RP3, |
| 199 | PCI_DID_INTEL_CMP_H_PCIE_RP4, |
| 200 | PCI_DID_INTEL_CMP_H_PCIE_RP5, |
| 201 | PCI_DID_INTEL_CMP_H_PCIE_RP6, |
| 202 | PCI_DID_INTEL_CMP_H_PCIE_RP7, |
| 203 | PCI_DID_INTEL_CMP_H_PCIE_RP8, |
| 204 | PCI_DID_INTEL_CMP_H_PCIE_RP9, |
| 205 | PCI_DID_INTEL_CMP_H_PCIE_RP10, |
| 206 | PCI_DID_INTEL_CMP_H_PCIE_RP11, |
| 207 | PCI_DID_INTEL_CMP_H_PCIE_RP12, |
| 208 | PCI_DID_INTEL_CMP_H_PCIE_RP13, |
| 209 | PCI_DID_INTEL_CMP_H_PCIE_RP14, |
| 210 | PCI_DID_INTEL_CMP_H_PCIE_RP15, |
| 211 | PCI_DID_INTEL_CMP_H_PCIE_RP16, |
| 212 | PCI_DID_INTEL_CMP_H_PCIE_RP17, |
| 213 | PCI_DID_INTEL_CMP_H_PCIE_RP18, |
| 214 | PCI_DID_INTEL_CMP_H_PCIE_RP19, |
| 215 | PCI_DID_INTEL_CMP_H_PCIE_RP20, |
| 216 | PCI_DID_INTEL_CMP_H_PCIE_RP21, |
| 217 | PCI_DID_INTEL_CMP_H_PCIE_RP22, |
| 218 | PCI_DID_INTEL_CMP_H_PCIE_RP23, |
| 219 | PCI_DID_INTEL_CMP_H_PCIE_RP24, |
| 220 | PCI_DID_INTEL_TGP_LP_PCIE_RP1, |
| 221 | PCI_DID_INTEL_TGP_LP_PCIE_RP2, |
| 222 | PCI_DID_INTEL_TGP_LP_PCIE_RP3, |
| 223 | PCI_DID_INTEL_TGP_LP_PCIE_RP4, |
| 224 | PCI_DID_INTEL_TGP_LP_PCIE_RP5, |
| 225 | PCI_DID_INTEL_TGP_LP_PCIE_RP6, |
| 226 | PCI_DID_INTEL_TGP_LP_PCIE_RP7, |
| 227 | PCI_DID_INTEL_TGP_LP_PCIE_RP8, |
| 228 | PCI_DID_INTEL_TGP_LP_PCIE_RP9, |
| 229 | PCI_DID_INTEL_TGP_LP_PCIE_RP10, |
| 230 | PCI_DID_INTEL_TGP_LP_PCIE_RP11, |
| 231 | PCI_DID_INTEL_TGP_LP_PCIE_RP12, |
| 232 | PCI_DID_INTEL_TGP_LP_PCIE_RP13, |
| 233 | PCI_DID_INTEL_TGP_LP_PCIE_RP14, |
| 234 | PCI_DID_INTEL_TGP_LP_PCIE_RP15, |
| 235 | PCI_DID_INTEL_TGP_LP_PCIE_RP16, |
| 236 | PCI_DID_INTEL_TGP_H_PCIE_RP1, |
| 237 | PCI_DID_INTEL_TGP_H_PCIE_RP2, |
| 238 | PCI_DID_INTEL_TGP_H_PCIE_RP3, |
| 239 | PCI_DID_INTEL_TGP_H_PCIE_RP4, |
| 240 | PCI_DID_INTEL_TGP_H_PCIE_RP5, |
| 241 | PCI_DID_INTEL_TGP_H_PCIE_RP6, |
| 242 | PCI_DID_INTEL_TGP_H_PCIE_RP7, |
| 243 | PCI_DID_INTEL_TGP_H_PCIE_RP8, |
| 244 | PCI_DID_INTEL_TGP_H_PCIE_RP9, |
| 245 | PCI_DID_INTEL_TGP_H_PCIE_RP10, |
| 246 | PCI_DID_INTEL_TGP_H_PCIE_RP11, |
| 247 | PCI_DID_INTEL_TGP_H_PCIE_RP12, |
| 248 | PCI_DID_INTEL_TGP_H_PCIE_RP13, |
| 249 | PCI_DID_INTEL_TGP_H_PCIE_RP14, |
| 250 | PCI_DID_INTEL_TGP_H_PCIE_RP15, |
| 251 | PCI_DID_INTEL_TGP_H_PCIE_RP16, |
| 252 | PCI_DID_INTEL_TGP_H_PCIE_RP17, |
| 253 | PCI_DID_INTEL_TGP_H_PCIE_RP18, |
| 254 | PCI_DID_INTEL_TGP_H_PCIE_RP19, |
| 255 | PCI_DID_INTEL_TGP_H_PCIE_RP20, |
| 256 | PCI_DID_INTEL_TGP_H_PCIE_RP21, |
| 257 | PCI_DID_INTEL_TGP_H_PCIE_RP22, |
| 258 | PCI_DID_INTEL_TGP_H_PCIE_RP23, |
| 259 | PCI_DID_INTEL_TGP_H_PCIE_RP24, |
| 260 | PCI_DID_INTEL_MCC_PCIE_RP1, |
| 261 | PCI_DID_INTEL_MCC_PCIE_RP2, |
| 262 | PCI_DID_INTEL_MCC_PCIE_RP3, |
| 263 | PCI_DID_INTEL_MCC_PCIE_RP4, |
| 264 | PCI_DID_INTEL_MCC_PCIE_RP5, |
| 265 | PCI_DID_INTEL_MCC_PCIE_RP6, |
| 266 | PCI_DID_INTEL_MCC_PCIE_RP7, |
| 267 | PCI_DID_INTEL_JSP_PCIE_RP1, |
| 268 | PCI_DID_INTEL_JSP_PCIE_RP2, |
| 269 | PCI_DID_INTEL_JSP_PCIE_RP3, |
| 270 | PCI_DID_INTEL_JSP_PCIE_RP4, |
| 271 | PCI_DID_INTEL_JSP_PCIE_RP5, |
| 272 | PCI_DID_INTEL_JSP_PCIE_RP6, |
| 273 | PCI_DID_INTEL_JSP_PCIE_RP7, |
| 274 | PCI_DID_INTEL_JSP_PCIE_RP8, |
| 275 | PCI_DID_INTEL_ADL_P_PCIE_RP1, |
| 276 | PCI_DID_INTEL_ADL_P_PCIE_RP2, |
| 277 | PCI_DID_INTEL_ADL_P_PCIE_RP3, |
| 278 | PCI_DID_INTEL_ADP_P_PCIE_RP1, |
| 279 | PCI_DID_INTEL_ADP_P_PCIE_RP2, |
| 280 | PCI_DID_INTEL_ADP_P_PCIE_RP3, |
| 281 | PCI_DID_INTEL_ADP_P_PCIE_RP4, |
| 282 | PCI_DID_INTEL_ADP_P_PCIE_RP5, |
| 283 | PCI_DID_INTEL_ADP_P_PCIE_RP6, |
| 284 | PCI_DID_INTEL_ADP_P_PCIE_RP7, |
| 285 | PCI_DID_INTEL_ADP_P_PCIE_RP8, |
| 286 | PCI_DID_INTEL_ADP_P_PCIE_RP9, |
| 287 | PCI_DID_INTEL_ADP_P_PCIE_RP10, |
| 288 | PCI_DID_INTEL_ADP_P_PCIE_RP11, |
| 289 | PCI_DID_INTEL_ADP_P_PCIE_RP12, |
| 290 | PCI_DID_INTEL_ADP_S_PCIE_RP1, |
| 291 | PCI_DID_INTEL_ADP_S_PCIE_RP2, |
| 292 | PCI_DID_INTEL_ADP_S_PCIE_RP3, |
| 293 | PCI_DID_INTEL_ADP_S_PCIE_RP4, |
| 294 | PCI_DID_INTEL_ADP_S_PCIE_RP5, |
| 295 | PCI_DID_INTEL_ADP_S_PCIE_RP6, |
| 296 | PCI_DID_INTEL_ADP_S_PCIE_RP7, |
| 297 | PCI_DID_INTEL_ADP_S_PCIE_RP8, |
| 298 | PCI_DID_INTEL_ADP_S_PCIE_RP9, |
| 299 | PCI_DID_INTEL_ADP_S_PCIE_RP10, |
| 300 | PCI_DID_INTEL_ADP_S_PCIE_RP11, |
| 301 | PCI_DID_INTEL_ADP_S_PCIE_RP12, |
| 302 | PCI_DID_INTEL_ADP_S_PCIE_RP13, |
| 303 | PCI_DID_INTEL_ADP_S_PCIE_RP14, |
| 304 | PCI_DID_INTEL_ADP_S_PCIE_RP15, |
| 305 | PCI_DID_INTEL_ADP_S_PCIE_RP16, |
| 306 | PCI_DID_INTEL_ADP_S_PCIE_RP17, |
| 307 | PCI_DID_INTEL_ADP_S_PCIE_RP18, |
| 308 | PCI_DID_INTEL_ADP_S_PCIE_RP19, |
| 309 | PCI_DID_INTEL_ADP_S_PCIE_RP20, |
| 310 | PCI_DID_INTEL_ADP_S_PCIE_RP21, |
| 311 | PCI_DID_INTEL_ADP_S_PCIE_RP22, |
| 312 | PCI_DID_INTEL_ADP_S_PCIE_RP23, |
| 313 | PCI_DID_INTEL_ADP_S_PCIE_RP24, |
| 314 | PCI_DID_INTEL_ADP_S_PCIE_RP25, |
| 315 | PCI_DID_INTEL_ADP_S_PCIE_RP26, |
| 316 | PCI_DID_INTEL_ADP_S_PCIE_RP27, |
| 317 | PCI_DID_INTEL_ADP_S_PCIE_RP28, |
| 318 | PCI_DID_INTEL_ADP_M_N_PCIE_RP1, |
| 319 | PCI_DID_INTEL_ADP_M_N_PCIE_RP2, |
| 320 | PCI_DID_INTEL_ADP_M_N_PCIE_RP3, |
| 321 | PCI_DID_INTEL_ADP_M_N_PCIE_RP4, |
| 322 | PCI_DID_INTEL_ADP_M_PCIE_RP5, |
| 323 | PCI_DID_INTEL_ADP_M_PCIE_RP6, |
| 324 | PCI_DID_INTEL_ADP_M_N_PCIE_RP7, |
| 325 | PCI_DID_INTEL_ADP_M_PCIE_RP8, |
| 326 | PCI_DID_INTEL_ADP_M_N_PCIE_RP9, |
| 327 | PCI_DID_INTEL_ADP_M_N_PCIE_RP10, |
| 328 | PCI_DID_INTEL_ADP_N_PCIE_RP11, |
| 329 | PCI_DID_INTEL_ADP_N_PCIE_RP12, |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 330 | 0 |
| 331 | }; |
| 332 | |
| 333 | static const struct pci_driver pch_pcie __pci_driver = { |
Nico Huber | 5768619 | 2022-08-06 19:11:55 +0200 | [diff] [blame] | 334 | .ops = &pcie_rp_ops, |
Felix Singer | 43b7f41 | 2022-03-07 04:34:52 +0100 | [diff] [blame] | 335 | .vendor = PCI_VID_INTEL, |
Aamir Bohra | 2d689f9 | 2017-05-11 20:27:27 +0530 | [diff] [blame] | 336 | .devices = pcie_device_ids, |
| 337 | }; |