blob: 74b73599585dc28bc4b1b5fe53f290386201eecf [file] [log] [blame]
Angel Ponsae593872020-04-04 18:50:57 +02001/* SPDX-License-Identifier: GPL-2.0-only */
Marc Jones24484842017-05-04 21:17:45 -06002
Felix Heldacd98d82022-10-18 19:28:50 +02003#include <amdblocks/gpio.h>
Felix Held91ef9252021-01-12 23:44:05 +01004#include <amdblocks/uart.h>
Felix Held3adfeec2022-10-20 19:14:08 +02005#include <commonlib/helpers.h>
Elyes Haouas5e2602a2023-01-14 05:46:25 +01006#include <gpio.h>
Felix Heldacd98d82022-10-18 19:28:50 +02007#include <soc/aoac_defs.h>
Felix Heldacd98d82022-10-18 19:28:50 +02008#include <soc/iomap.h>
Felix Held91ef9252021-01-12 23:44:05 +01009#include <types.h>
Marc Jones24484842017-05-04 21:17:45 -060010
Felix Heldacd98d82022-10-18 19:28:50 +020011static const struct soc_uart_ctrlr_info uart_info[] = {
12 [0] = { APU_UART0_BASE, FCH_AOAC_DEV_UART0, "FUR0", {
13 PAD_NF(GPIO_138, UART0_TXD, PULL_NONE),
14 PAD_NF(GPIO_136, UART0_RXD, PULL_NONE),
15 } },
16 [1] = { APU_UART1_BASE, FCH_AOAC_DEV_UART1, "FUR1", {
17 PAD_NF(GPIO_143, UART1_TXD, PULL_NONE),
18 PAD_NF(GPIO_141, UART1_RXD, PULL_NONE),
19 } },
20};
21
Felix Held97e61252022-10-18 19:03:20 +020022const struct soc_uart_ctrlr_info *soc_get_uart_ctrlr_info(size_t *num_ctrlrs)
Felix Held88036402022-10-18 20:22:48 +020023{
24 *num_ctrlrs = ARRAY_SIZE(uart_info);
25 return uart_info;
26}