Angel Pons | ae59387 | 2020-04-04 18:50:57 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Chris Ching | 6fc39d4 | 2017-12-20 16:06:03 -0700 | [diff] [blame] | 2 | |
Marshall Dawson | f42344a | 2019-05-02 12:53:00 -0600 | [diff] [blame] | 3 | #include <amdblocks/acpimmio.h> |
Karthikeyan Ramasubramanian | 0dbea48 | 2021-03-08 23:23:50 -0700 | [diff] [blame] | 4 | #include <amdblocks/i2c.h> |
Chris Ching | 6fc39d4 | 2017-12-20 16:06:03 -0700 | [diff] [blame] | 5 | #include <soc/iomap.h> |
Marshall Dawson | f42344a | 2019-05-02 12:53:00 -0600 | [diff] [blame] | 6 | #include <soc/i2c.h> |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame] | 7 | #include "chip.h" |
Zheng Bao | 533fc4d | 2021-10-30 21:31:04 +0800 | [diff] [blame] | 8 | #include <drivers/i2c/designware/dw_i2c.h> |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame] | 9 | |
Fred Reitberger | 1383122 | 2022-10-17 11:49:55 -0400 | [diff] [blame] | 10 | /* Table to switch SCL pins to outputs to initially reset the I2C peripherals */ |
| 11 | static const struct soc_i2c_scl_pin i2c_scl_pins[] = { |
| 12 | I2C_RESET_SCL_PIN(I2C0_SCL_PIN, GPIO_I2C0_SCL), |
| 13 | I2C_RESET_SCL_PIN(I2C1_SCL_PIN, GPIO_I2C1_SCL), |
| 14 | I2C_RESET_SCL_PIN(I2C2_SCL_PIN, GPIO_I2C2_SCL), |
| 15 | I2C_RESET_SCL_PIN(I2C3_SCL_PIN, GPIO_I2C3_SCL), |
| 16 | }; |
| 17 | |
Karthikeyan Ramasubramanian | 4f87ae1 | 2021-03-18 23:16:29 -0600 | [diff] [blame] | 18 | static const struct soc_i2c_ctrlr_info i2c_ctrlr[] = { |
Felix Held | d1da957 | 2021-10-15 16:29:22 +0200 | [diff] [blame] | 19 | { I2C_MASTER_MODE, APU_I2C0_BASE, "I2CA" }, |
| 20 | { I2C_MASTER_MODE, APU_I2C1_BASE, "I2CB" }, |
| 21 | { I2C_MASTER_MODE, APU_I2C2_BASE, "I2CC" }, |
| 22 | { I2C_MASTER_MODE, APU_I2C3_BASE, "I2CD" }, |
Aaron Durbin | 2b2c65c | 2018-01-08 10:48:05 -0700 | [diff] [blame] | 23 | }; |
Chris Ching | 6fc39d4 | 2017-12-20 16:06:03 -0700 | [diff] [blame] | 24 | |
Fred Reitberger | 1383122 | 2022-10-17 11:49:55 -0400 | [diff] [blame] | 25 | void reset_i2c_peripherals(void) |
| 26 | { |
| 27 | const struct soc_amd_stoneyridge_config *cfg = config_of_soc(); |
| 28 | struct soc_i2c_peripheral_reset_info reset_info; |
| 29 | |
| 30 | reset_info.i2c_scl_reset_mask = cfg->i2c_scl_reset & GPIO_I2C_MASK; |
| 31 | reset_info.i2c_scl = i2c_scl_pins; |
| 32 | reset_info.num_pins = ARRAY_SIZE(i2c_scl_pins); |
| 33 | sb_reset_i2c_peripherals(&reset_info); |
| 34 | } |
| 35 | |
Karthikeyan Ramasubramanian | 4f87ae1 | 2021-03-18 23:16:29 -0600 | [diff] [blame] | 36 | const struct soc_i2c_ctrlr_info *soc_get_i2c_ctrlr_info(size_t *num_ctrlrs) |
Chris Ching | 6fc39d4 | 2017-12-20 16:06:03 -0700 | [diff] [blame] | 37 | { |
Karthikeyan Ramasubramanian | 4f87ae1 | 2021-03-18 23:16:29 -0600 | [diff] [blame] | 38 | *num_ctrlrs = ARRAY_SIZE(i2c_ctrlr); |
| 39 | return i2c_ctrlr; |
Chris Ching | 6fc39d4 | 2017-12-20 16:06:03 -0700 | [diff] [blame] | 40 | } |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame] | 41 | |
Karthikeyan Ramasubramanian | 4f87ae1 | 2021-03-18 23:16:29 -0600 | [diff] [blame] | 42 | const struct dw_i2c_bus_config *soc_get_i2c_bus_config(size_t *num_buses) |
Aaron Durbin | de3e84c | 2018-01-29 17:44:58 -0700 | [diff] [blame] | 43 | { |
Karthikeyan Ramasubramanian | 4f87ae1 | 2021-03-18 23:16:29 -0600 | [diff] [blame] | 44 | const struct soc_amd_stoneyridge_config *config = config_of_soc(); |
Aaron Durbin | de3e84c | 2018-01-29 17:44:58 -0700 | [diff] [blame] | 45 | |
Karthikeyan Ramasubramanian | 4f87ae1 | 2021-03-18 23:16:29 -0600 | [diff] [blame] | 46 | *num_buses = ARRAY_SIZE(config->i2c); |
| 47 | return config->i2c; |
Justin TerAvest | 13101a7 | 2018-01-24 14:23:12 -0700 | [diff] [blame] | 48 | } |
Zheng Bao | 533fc4d | 2021-10-30 21:31:04 +0800 | [diff] [blame] | 49 | |
| 50 | void soc_i2c_misc_init(unsigned int bus, const struct dw_i2c_bus_config *cfg) |
| 51 | { |
| 52 | /* Do nothing. */ |
| 53 | } |