blob: ee6ab91c6d9c88411b7f257428c172b8735807f6 [file] [log] [blame]
Felix Held25aa5602021-12-15 20:52:10 +01001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <amdblocks/agesawrapper.h>
4#include <device/device.h>
5#include <soc/pci_devs.h>
6
7static int is_sata_config(void)
8{
9 return !((SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE)
10 || (SataLegacyIde == CONFIG_STONEYRIDGE_SATA_MODE));
11}
12
13static inline int sb_sata_enable(void)
14{
15 /* True if IDE or AHCI. */
16 return (SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) ||
17 (SataAhci == CONFIG_STONEYRIDGE_SATA_MODE);
18}
19
20static inline int sb_ide_enable(void)
21{
22 /* True if IDE or LEGACY IDE. */
23 return (SataNativeIde == CONFIG_STONEYRIDGE_SATA_MODE) ||
24 (SataLegacyIde == CONFIG_STONEYRIDGE_SATA_MODE);
25}
26
27void SetFchResetParams(FCH_RESET_INTERFACE *params)
28{
29 const struct device *dev = pcidev_path_on_root(SATA_DEVFN);
30 params->Xhci0Enable = CONFIG(STONEYRIDGE_XHCI_ENABLE);
31 if (dev && dev->enabled) {
32 params->SataEnable = sb_sata_enable();
33 params->IdeEnable = sb_ide_enable();
34 } else {
35 params->SataEnable = FALSE;
36 params->IdeEnable = FALSE;
37 }
38}
39
40void SetFchEnvParams(FCH_INTERFACE *params)
41{
42 const struct device *dev = pcidev_path_on_root(SATA_DEVFN);
43 params->AzaliaController = AzEnable;
44 params->SataClass = CONFIG_STONEYRIDGE_SATA_MODE;
45 if (dev && dev->enabled) {
46 params->SataEnable = is_sata_config();
47 params->IdeEnable = !params->SataEnable;
48 params->SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE ==
49 SataLegacyIde);
50 } else {
51 params->SataEnable = FALSE;
52 params->IdeEnable = FALSE;
53 params->SataIdeMode = FALSE;
54 }
55}
56
57void SetFchMidParams(FCH_INTERFACE *params)
58{
59 SetFchEnvParams(params);
60}