Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 3 | #include <amdblocks/spi.h> |
| 4 | #include <soc/espi.h> |
| 5 | #include <types.h> |
| 6 | |
Felix Held | 0e9dbf0 | 2023-01-19 23:06:54 +0100 | [diff] [blame] | 7 | #define ESPI_CNTRL_REGISTER 0x10 /* SPI register, not eSPI register! */ |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 8 | #define LOCK_SPIX10_BIT2 BIT(3) |
| 9 | #define ESPI_MUX_SPI1 BIT(2) |
| 10 | #define ROM_ADDR_WR_PROT BIT(1) |
Martin Roth | f95a11e | 2022-10-21 16:43:08 -0600 | [diff] [blame] | 11 | |
| 12 | void espi_switch_to_spi1_pads(void) |
| 13 | { |
| 14 | uint8_t reg = spi_read8(ESPI_CNTRL_REGISTER); |
| 15 | |
| 16 | reg |= ESPI_MUX_SPI1; |
| 17 | |
| 18 | spi_write8(ESPI_CNTRL_REGISTER, reg); |
| 19 | } |