Felix Held | 8d0a609 | 2021-01-14 01:40:50 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
Raul E Rangel | 73193cf | 2021-07-16 13:53:29 -0600 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Raul E Rangel | 61f44127 | 2021-06-25 11:24:38 -0600 | [diff] [blame] | 4 | #include <amdblocks/apob_cache.h> |
Nikolai Vyssotski | 42cd4dd | 2021-03-11 19:29:51 -0600 | [diff] [blame] | 5 | #include <device/pci.h> |
Raul E Rangel | 61f44127 | 2021-06-25 11:24:38 -0600 | [diff] [blame] | 6 | #include <fsp/api.h> |
Raul E Rangel | 73193cf | 2021-07-16 13:53:29 -0600 | [diff] [blame] | 7 | #include <program_loading.h> |
Felix Held | 8d0a609 | 2021-01-14 01:40:50 +0100 | [diff] [blame] | 8 | |
Nikolai Vyssotski | 2d24146 | 2021-02-11 20:08:22 -0600 | [diff] [blame] | 9 | static void fsp_assign_vbios_upds(FSP_S_CONFIG *scfg) |
| 10 | { |
Matt Papageorge | 5f5ca0c | 2021-03-25 11:22:47 -0500 | [diff] [blame] | 11 | scfg->vbios_buffer = CONFIG(RUN_FSP_GOP) ? PCI_VGA_RAM_IMAGE_START : 0; |
Nikolai Vyssotski | 2d24146 | 2021-02-11 20:08:22 -0600 | [diff] [blame] | 12 | } |
| 13 | |
Felix Held | 8d0a609 | 2021-01-14 01:40:50 +0100 | [diff] [blame] | 14 | void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) |
| 15 | { |
Nikolai Vyssotski | 2d24146 | 2021-02-11 20:08:22 -0600 | [diff] [blame] | 16 | FSP_S_CONFIG *scfg = &supd->FspsConfig; |
| 17 | |
| 18 | fsp_assign_vbios_upds(scfg); |
Raul E Rangel | 61f44127 | 2021-06-25 11:24:38 -0600 | [diff] [blame] | 19 | |
| 20 | /* |
Raul Rangel | 0b37036 | 2023-05-08 18:02:28 +0000 | [diff] [blame] | 21 | * At this point FSP-S has been loaded into RAM. If we were to start loading the APOB |
| 22 | * before FSP-S was loaded, we would introduce contention onto the SPI bus and |
| 23 | * slow down the FSP-S read from SPI. Since FSP-S takes a while to execute and performs |
| 24 | * no SPI operations, we can read the APOB while FSP-S executes. |
Raul E Rangel | 61f44127 | 2021-06-25 11:24:38 -0600 | [diff] [blame] | 25 | */ |
| 26 | start_apob_cache_read(); |
Raul E Rangel | 73193cf | 2021-07-16 13:53:29 -0600 | [diff] [blame] | 27 | /* |
| 28 | * We enqueue the payload to be loaded after the APOB. This might cause a bit of |
| 29 | * bus contention when loading uCode and OPROMs, but since those calls happen at |
| 30 | * different points in the boot state machine it's a little harder to sequence all the |
| 31 | * async loading correctly. So in order to keep the complexity down, we enqueue the |
| 32 | * payload preload here. The end goal will be to add uCode and OPROM preloading |
| 33 | * before the payload so that the sequencing is correct. |
| 34 | * |
| 35 | * While FSP-S is executing, it's not currently possible to enqueue other transactions |
| 36 | * because FSP-S doesn't call `thread_yield()`. So the payload will start loading |
| 37 | * right after FSP-S completes. |
| 38 | */ |
| 39 | if (!acpi_is_wakeup_s3()) |
| 40 | payload_preload(); |
Felix Held | 8d0a609 | 2021-01-14 01:40:50 +0100 | [diff] [blame] | 41 | } |