blob: 363e31f96d703fcf2d2070a118ada3e1ac561935 [file] [log] [blame]
Balazs Vinarzffa710b2019-01-18 10:53:13 +01001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <vendorcode/amd/agesa/f15tn/AGESA.h>
4
5/* Include the files that instantiate the configuration definitions. */
6#include <vendorcode/amd/agesa/f15tn/Include/AdvancedApi.h>
7#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuFamilyTranslation.h>
8#include <vendorcode/amd/agesa/f15tn/Proc/CPU/Feature/cpuFeatures.h>
9#include <vendorcode/amd/agesa/f15tn/Proc/CPU/heapManager.h>
10/* AGESA nonsense: the next two headers depend on heapManager.h */
11#include <vendorcode/amd/agesa/f15tn/Proc/Common/CreateStruct.h>
12#include <vendorcode/amd/agesa/f15tn/Proc/CPU/cpuEarlyInit.h>
13/* These tables are optional and may be used to adjust memory timing settings */
14#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mm.h>
15#include <vendorcode/amd/agesa/f15tn/Proc/Mem/mn.h>
16
17/* Select the CPU family */
18#define INSTALL_FAMILY_15_MODEL_1x_SUPPORT TRUE
19
20/* Select the CPU socket type */
21#define INSTALL_FM2_SOCKET_SUPPORT TRUE
22
23#define BLDOPT_REMOVE_SODIMMS_SUPPORT TRUE
24#define BLDOPT_REMOVE_RDIMMS_SUPPORT TRUE
25#define BLDOPT_REMOVE_LRDIMMS_SUPPORT TRUE
26#define BLDOPT_REMOVE_ECC_SUPPORT TRUE
27#define BLDOPT_REMOVE_SRAT FALSE
28#define BLDOPT_REMOVE_WHEA FALSE
Paul Menzeld354c082020-10-17 13:10:32 +020029#define BLDOPT_REMOVE_CRAT TRUE
Balazs Vinarzffa710b2019-01-18 10:53:13 +010030
31/* Build configuration values here. */
32#define BLDCFG_AMD_PLATFORM_TYPE AMD_PLATFORM_DESKTOP
33
34#define BLDCFG_MEMORY_RDIMM_CAPABLE FALSE
35#define BLDCFG_MEMORY_UDIMM_CAPABLE TRUE
36#define BLDCFG_MEMORY_SODIMM_CAPABLE FALSE
37#define BLDCFG_MEMORY_CHANNEL_INTERLEAVING TRUE
38#define BLDCFG_MEMORY_CLOCK_SELECT DDR1866_FREQUENCY
39#define BLDCFG_ENABLE_ECC_FEATURE FALSE
40#define BLDCFG_ECC_SYNC_FLOOD FALSE
41
42#define BLDCFG_PLATFORM_CPB_MODE CpbModeAuto
43
44#define BLDCFG_UMA_ALLOCATION_MODE UMA_SPECIFIED
45#define BLDCFG_UMA_ALLOCATION_SIZE 0x2000 /* (0x2000 << 16) = 512M */
46
47#define BLDCFG_IOMMU_SUPPORT TRUE
48
49#define BLDCFG_CFG_GNB_HD_AUDIO TRUE
50
51/* Customized OEM build configurations for FCH component */
52#define BLDCFG_FCH_GPP_LINK_CONFIG PortA1B1C1D1
53#define BLDCFG_FCH_GPP_PORT0_PRESENT TRUE
54#define BLDCFG_FCH_GPP_PORT1_PRESENT TRUE
55#define BLDCFG_FCH_GPP_PORT2_PRESENT TRUE
56
Arthur Heymans8d3640d2022-05-16 12:27:36 +020057CONST GPIO_CONTROL a88xm_e_gpio[] = {
Balazs Vinarzffa710b2019-01-18 10:53:13 +010058 {-1}
59};
60#define BLDCFG_FCH_GPIO_CONTROL_LIST (a88xm_e_gpio)
61
62/* Moving this include up will break AGESA. */
63#include <PlatformInstall.h>