| Kyösti Mälkki | f09e6d4 | 2015-01-10 12:13:23 +0200 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2011 Advanced Micro Devices, Inc. |
| Kyösti Mälkki | 8c190f3 | 2014-11-14 16:20:22 +0200 | [diff] [blame^] | 5 | * Copyright (C) 2013-2014 Sage Electronic Engineering, LLC |
| Kyösti Mälkki | f09e6d4 | 2015-01-10 12:13:23 +0200 | [diff] [blame] | 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 19 | */ |
| 20 | |
| 21 | /* DefinitionBlock Statement */ |
| 22 | DefinitionBlock ( |
| 23 | "DSDT.AML", /* Output filename */ |
| 24 | "DSDT", /* Signature */ |
| 25 | 0x02, /* DSDT Revision, needs to be 2 for 64bit */ |
| Kyösti Mälkki | 8c190f3 | 2014-11-14 16:20:22 +0200 | [diff] [blame^] | 26 | "PCENG ", /* OEMID */ |
| Kyösti Mälkki | f09e6d4 | 2015-01-10 12:13:23 +0200 | [diff] [blame] | 27 | "COREBOOT", /* TABLE ID */ |
| 28 | 0x00010001 /* OEM Revision */ |
| 29 | ) |
| 30 | { /* Start of ASL file */ |
| 31 | /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */ |
| 32 | |
| 33 | #include "acpi/mainboard.asl" |
| 34 | |
| 35 | #include <cpu/amd/agesa/family14/acpi/cpu.asl> |
| 36 | |
| 37 | #include "acpi/routing.asl" |
| 38 | |
| 39 | Scope(\_SB) { |
| 40 | /* global utility methods expected within the \_SB scope */ |
| 41 | #include <arch/x86/acpi/globutil.asl> |
| 42 | |
| 43 | Device(PCI0) { |
| 44 | |
| 45 | /* Describe the AMD Northbridge */ |
| 46 | #include <northbridge/amd/agesa/family14/acpi/northbridge.asl> |
| 47 | |
| 48 | /* Describe the AMD Fusion Controller Hub Southbridge */ |
| 49 | #include <southbridge/amd/cimx/sb800/acpi/fch.asl> |
| 50 | |
| 51 | /* Primary (and only) IDE channel */ |
| 52 | Device(IDEC) { |
| 53 | Name(_ADR, 0x00140001) |
| 54 | #include "acpi/ide.asl" |
| 55 | } /* end IDEC */ |
| 56 | |
| 57 | } |
| 58 | } /* End Scope(_SB) */ |
| 59 | |
| 60 | /* Contains the supported sleep states for this chipset */ |
| 61 | #include <southbridge/amd/cimx/sb800/acpi/sleepstates.asl> |
| 62 | |
| 63 | /* Contains the Sleep methods (WAK, PTS, GTS, etc.) */ |
| 64 | #include "acpi/sleep.asl" |
| 65 | |
| 66 | #include "acpi/gpe.asl" |
| 67 | #include <southbridge/amd/cimx/sb800/acpi/smbus.asl> |
| 68 | #include "acpi/thermal.asl" |
| 69 | } |
| 70 | /* End of ASL file */ |