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zbao246e84b2012-07-13 18:47:03 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2010 Advanced Micro Devices, Inc.
Dave Frodin2093c4f2014-06-13 08:12:48 -06005 * Copyright (C) 2014 Sage Electronic Engineering, LLC.
zbao246e84b2012-07-13 18:47:03 +08006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Paul Menzela46a7122013-02-23 18:37:27 +010018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
zbao246e84b2012-07-13 18:47:03 +080019 */
20
21#include <console/console.h>
22#include <device/device.h>
23#include <device/pci.h>
24#include <device/pci_ids.h>
25#include <device/pci_ops.h>
26#include "hudson.h"
Dave Frodin2093c4f2014-06-13 08:12:48 -060027#include <southbridge/amd/amd_pci_util.h>
28#include <bootstate.h>
zbao246e84b2012-07-13 18:47:03 +080029
zbao246e84b2012-07-13 18:47:03 +080030
Dave Frodin2093c4f2014-06-13 08:12:48 -060031/*
32 * Update the PCI devices with a valid IRQ number
33 * that is set in the mainboard PCI_IRQ structures.
34 */
35static void set_pci_irqs(void *unused)
36{
37 /* Write PCI_INTR regs 0xC00/0xC01 */
38 write_pci_int_table();
39
40 /* Write IRQs for all devicetree enabled devices */
41 write_pci_cfg_irqs();
42}
43
44/*
45 * Hook this function into the PCI state machine
46 * on entry into BS_DEV_ENABLE.
47 */
48BOOT_STATE_INIT_ENTRIES(pci_irq_update) = {
49 BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY,
50 set_pci_irqs, NULL),
51};
52
zbao246e84b2012-07-13 18:47:03 +080053static struct pci_operations lops_pci = {
54 .set_subsystem = 0,
55};
56
57static struct device_operations pci_ops = {
58 .read_resources = pci_bus_read_resources,
59 .set_resources = pci_dev_set_resources,
60 .enable_resources = pci_bus_enable_resources,
Edward O'Callaghan8be82e12014-11-27 14:36:13 +110061 .init = DEVICE_NOOP,
zbao246e84b2012-07-13 18:47:03 +080062 .scan_bus = pci_scan_bridge,
63 .reset_bus = pci_bus_reset,
64 .ops_pci = &lops_pci,
65};
66
67static const struct pci_driver pci_driver __pci_driver = {
68 .ops = &pci_ops,
69 .vendor = PCI_VENDOR_ID_AMD,
70 .device = PCI_DEVICE_ID_ATI_SB900_PCI,
71};