Kyösti Mälkki | 7b73e852 | 2022-11-08 04:43:41 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | |
| 3 | #include <assert.h> |
| 4 | #include <console/console.h> |
| 5 | #include <device/pci_ops.h> |
| 6 | #include <device/device.h> |
| 7 | #include <device/pci.h> |
| 8 | #include <cpu/cpu.h> |
| 9 | |
| 10 | #include "e7505.h" |
| 11 | |
| 12 | static void mch_domain_read_resources(struct device *dev) |
| 13 | { |
| 14 | int idx; |
| 15 | unsigned long tolmk; |
| 16 | uint64_t tom, remapbase, remaplimit; |
| 17 | struct device *mc_dev; |
| 18 | |
| 19 | pci_domain_read_resources(dev); |
| 20 | |
| 21 | mc_dev = pcidev_on_root(0, 0); |
| 22 | if (!mc_dev) |
| 23 | die("Could not find MCH device\n"); |
| 24 | |
| 25 | tolmk = pci_read_config16(mc_dev, TOLM) >> 11; |
| 26 | tolmk <<= 17; |
| 27 | |
| 28 | tom = pci_read_config8(mc_dev, DRB_ROW_7); |
| 29 | tom <<= 26; |
| 30 | |
| 31 | /* Remapped region with a 64 MiB granularity in register |
| 32 | definition. Limit is inclusive, so add one. */ |
| 33 | remapbase = pci_read_config16(mc_dev, REMAPBASE) & 0x3ff; |
| 34 | remapbase <<= 26; |
| 35 | |
| 36 | remaplimit = pci_read_config16(mc_dev, REMAPLIMIT) & 0x3ff; |
| 37 | remaplimit += 1; |
| 38 | remaplimit <<= 26; |
| 39 | |
| 40 | /* Report the memory regions */ |
| 41 | idx = 10; |
| 42 | ram_resource_kb(dev, idx++, 0, tolmk); |
| 43 | mmio_resource_kb(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB); |
| 44 | |
Kyösti Mälkki | 560c3f5 | 2022-01-18 04:25:48 +0200 | [diff] [blame] | 45 | uintptr_t tseg_memory_base = northbridge_get_tseg_base(); |
| 46 | size_t tseg_memory_size = northbridge_get_tseg_size(); |
| 47 | mmio_resource_kb(dev, idx++, tseg_memory_base / KiB, tseg_memory_size / KiB); |
Kyösti Mälkki | 7b73e852 | 2022-11-08 04:43:41 +0000 | [diff] [blame] | 48 | |
| 49 | ASSERT(tom == remapbase); |
| 50 | upper_ram_end(dev, idx++, remaplimit); |
| 51 | } |
| 52 | |
| 53 | static void mch_domain_set_resources(struct device *dev) |
| 54 | { |
| 55 | assign_resources(dev->link_list); |
| 56 | } |
| 57 | |
| 58 | static struct device_operations pci_domain_ops = { |
| 59 | .read_resources = mch_domain_read_resources, |
| 60 | .set_resources = mch_domain_set_resources, |
| 61 | .scan_bus = pci_domain_scan_bus, |
| 62 | .ops_pci = &pci_dev_ops_pci, |
| 63 | }; |
| 64 | |
| 65 | |
| 66 | static struct device_operations cpu_bus_ops = { |
| 67 | .read_resources = noop_read_resources, |
| 68 | .set_resources = noop_set_resources, |
| 69 | .init = mp_cpu_bus_init, |
| 70 | }; |
| 71 | |
| 72 | static void enable_dev(struct device *dev) |
| 73 | { |
| 74 | /* Set the operations if it is a special bus type */ |
| 75 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
| 76 | dev->ops = &pci_domain_ops; |
| 77 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
| 78 | dev->ops = &cpu_bus_ops; |
| 79 | } |
| 80 | } |
| 81 | |
| 82 | struct chip_operations northbridge_intel_e7505_ops = { |
| 83 | CHIP_NAME("Intel E7505 Northbridge") |
| 84 | .enable_dev = enable_dev, |
| 85 | }; |