Oskar Enoksson | 2516f2e | 2014-02-08 00:17:21 +0100 | [diff] [blame] | 1 | /* |
| 2 | * ACPI - create the Fixed ACPI Description Tables (FADT) |
| 3 | * (C) Copyright 2005 Stefan Reinauer <stepan@openbios.org> |
| 4 | * Copyright (C) 2011,2014 Oskar Enoksson <enok@lysator.liu.se> |
| 5 | */ |
| 6 | |
| 7 | #include <string.h> |
| 8 | #include <console/console.h> |
| 9 | #include <arch/acpi.h> |
| 10 | |
Elyes HAOUAS | 8ab989e | 2016-07-30 17:46:17 +0200 | [diff] [blame^] | 11 | extern unsigned pm_base; /* pm_base should be set in sb ACPI */ |
Oskar Enoksson | 2516f2e | 2014-02-08 00:17:21 +0100 | [diff] [blame] | 12 | |
| 13 | void acpi_create_fadt(acpi_fadt_t *fadt,acpi_facs_t *facs,void *dsdt){ |
| 14 | |
| 15 | acpi_header_t *header=&(fadt->header); |
| 16 | |
| 17 | printk(BIOS_DEBUG, "pm_base: 0x%04x\n", pm_base); |
| 18 | |
| 19 | /* Prepare the header */ |
| 20 | memset((void *)fadt,0,sizeof(acpi_fadt_t)); |
| 21 | memcpy(header->signature,"FACP",4); |
| 22 | header->length = 244; |
| 23 | header->revision = 3; |
| 24 | memcpy(header->oem_id,OEM_ID,6); |
| 25 | memcpy(header->oem_table_id,"COREBOOT",8); |
| 26 | memcpy(header->asl_compiler_id,ASLC,4); |
| 27 | header->asl_compiler_revision=0; |
| 28 | |
| 29 | fadt->firmware_ctrl=(u32)facs; |
| 30 | fadt->dsdt= (u32)dsdt; |
| 31 | // 3=Workstation,4=Enterprise Server, 7=Performance Server |
| 32 | fadt->preferred_pm_profile=0x04; |
| 33 | fadt->sci_int=9; |
| 34 | |
| 35 | // disable system management mode by setting to 0: |
| 36 | fadt->smi_cmd = 0;//pm_base+0x2f; |
| 37 | fadt->acpi_enable = 0xf0; |
| 38 | fadt->acpi_disable = 0xf1; |
| 39 | fadt->s4bios_req = 0x0; |
| 40 | fadt->pstate_cnt = 0xe2; |
| 41 | |
| 42 | fadt->pm1a_evt_blk = pm_base; |
| 43 | fadt->pm1b_evt_blk = 0x0000; |
| 44 | fadt->pm1a_cnt_blk = pm_base+0x04; |
| 45 | fadt->pm1b_cnt_blk = 0x0000; |
| 46 | fadt->pm2_cnt_blk = 0x0000; |
| 47 | fadt->pm_tmr_blk = pm_base+0x08; |
| 48 | fadt->gpe0_blk = pm_base+0x20; |
| 49 | fadt->gpe1_blk = pm_base+0xb0; |
| 50 | |
| 51 | fadt->pm1_evt_len = 4; |
| 52 | fadt->pm1_cnt_len = 2; |
| 53 | fadt->pm2_cnt_len = 0; |
| 54 | fadt->pm_tmr_len = 4; |
| 55 | fadt->gpe0_blk_len = 4; |
| 56 | fadt->gpe1_blk_len = 8; |
| 57 | fadt->gpe1_base = 16; |
| 58 | |
| 59 | fadt->cst_cnt = 0xe3; |
| 60 | fadt->p_lvl2_lat = 101; // > 100 means system doesnt support C2 state |
| 61 | fadt->p_lvl3_lat = 1001; // > 1000 means system doesnt support C3 state |
| 62 | fadt->flush_size = 0; // ignored if wbindv=1 in flags |
| 63 | fadt->flush_stride = 0; // ignored if wbindv=1 in flags |
| 64 | fadt->duty_offset = 1; |
| 65 | fadt->duty_width = 3; // 0 means duty cycle not supported |
| 66 | // _alrm value 0 means RTC alarm feature not supported |
| 67 | fadt->day_alrm = 0; // 0x7d these have to be |
| 68 | fadt->mon_alrm = 0; // 0x7e added to cmos.layout |
| 69 | fadt->century = 0; // 0x7f to make rtc alrm work |
| 70 | fadt->iapc_boot_arch = |
| 71 | ACPI_FADT_LEGACY_DEVICES | |
| 72 | ACPI_FADT_8042 | |
| 73 | // ACPI_FADT_VGA_NOT_PRESENT | |
| 74 | // ACPI_FADT_MSI_NOT_SUPPORTED| |
| 75 | // ACPI_FADT_NO_PCIE_ASPM_CONTROL| |
| 76 | 0; |
| 77 | |
| 78 | fadt->res2 = 0; |
| 79 | |
| 80 | fadt->flags = |
| 81 | ACPI_FADT_WBINVD | |
| 82 | // ACPI_FADT_WBINVD_FLUSH | |
| 83 | ACPI_FADT_C1_SUPPORTED | |
| 84 | // ACPI_FADT_C2_MP_SUPPORTED | |
| 85 | // ACPI_FADT_POWER_BUTTON | |
| 86 | ACPI_FADT_SLEEP_BUTTON | |
| 87 | // ACPI_FADT_FIXED_RTC | |
| 88 | // ACPI_FADT_S4_RTC_WAKE | |
| 89 | // ACPI_FADT_32BIT_TIMER | |
| 90 | // ACPI_FADT_DOCKING_SUPPORTED| |
| 91 | // ACPI_FADT_RESET_REGISTER | |
| 92 | // ACPI_FADT_SEALED_CASE | |
| 93 | // ACPI_FADT_HEADLESS | |
| 94 | // ACPI_FADT_SLEEP_TYPE | |
| 95 | // ACPI_FADT_PCI_EXPRESS_WAKE | |
| 96 | // ACPI_FADT_PLATFORM_CLOCK | |
| 97 | // ACPI_FADT_S4_RTC_VALID | |
| 98 | // ACPI_FADT_REMOTE_POWER_ON | |
| 99 | // ACPI_FADT_APIC_CLUSTER | |
| 100 | // ACPI_FADT_APIC_PHYSICAL | |
| 101 | 0; |
| 102 | |
| 103 | fadt->reset_reg.space_id = 1; |
| 104 | fadt->reset_reg.bit_width = 8; |
| 105 | fadt->reset_reg.bit_offset = 0; |
| 106 | fadt->reset_reg.resv = 0; |
| 107 | fadt->reset_reg.addrl = 0xcf9; |
| 108 | fadt->reset_reg.addrh = 0x0; |
| 109 | |
| 110 | fadt->reset_value = 6; |
| 111 | |
| 112 | fadt->res3 = 0; |
| 113 | fadt->res4 = 0; |
| 114 | fadt->res5 = 0; |
| 115 | |
| 116 | fadt->x_firmware_ctl_l = (u32)facs; |
| 117 | fadt->x_firmware_ctl_h = 0; |
| 118 | fadt->x_dsdt_l = (u32)dsdt; |
| 119 | fadt->x_dsdt_h = 0; |
| 120 | |
| 121 | fadt->x_pm1a_evt_blk.space_id = 1; |
| 122 | fadt->x_pm1a_evt_blk.bit_width = 32; |
| 123 | fadt->x_pm1a_evt_blk.bit_offset = 0; |
| 124 | fadt->x_pm1a_evt_blk.resv = 0; |
| 125 | fadt->x_pm1a_evt_blk.addrl = pm_base; |
| 126 | fadt->x_pm1a_evt_blk.addrh = 0x0; |
| 127 | |
| 128 | fadt->x_pm1b_evt_blk.space_id = 1; |
| 129 | fadt->x_pm1b_evt_blk.bit_width = 4; |
| 130 | fadt->x_pm1b_evt_blk.bit_offset = 0; |
| 131 | fadt->x_pm1b_evt_blk.resv = 0; |
| 132 | fadt->x_pm1b_evt_blk.addrl = 0x0; |
| 133 | fadt->x_pm1b_evt_blk.addrh = 0x0; |
| 134 | |
| 135 | fadt->x_pm1a_cnt_blk.space_id = 1; |
| 136 | fadt->x_pm1a_cnt_blk.bit_width = 16; |
| 137 | fadt->x_pm1a_cnt_blk.bit_offset = 0; |
| 138 | fadt->x_pm1a_cnt_blk.resv = 0; |
| 139 | fadt->x_pm1a_cnt_blk.addrl = pm_base+4; |
| 140 | fadt->x_pm1a_cnt_blk.addrh = 0x0; |
| 141 | |
| 142 | fadt->x_pm1b_cnt_blk.space_id = 1; |
| 143 | fadt->x_pm1b_cnt_blk.bit_width = 2; |
| 144 | fadt->x_pm1b_cnt_blk.bit_offset = 0; |
| 145 | fadt->x_pm1b_cnt_blk.resv = 0; |
| 146 | fadt->x_pm1b_cnt_blk.addrl = 0x0; |
| 147 | fadt->x_pm1b_cnt_blk.addrh = 0x0; |
| 148 | |
| 149 | |
| 150 | fadt->x_pm2_cnt_blk.space_id = 1; |
| 151 | fadt->x_pm2_cnt_blk.bit_width = 0; |
| 152 | fadt->x_pm2_cnt_blk.bit_offset = 0; |
| 153 | fadt->x_pm2_cnt_blk.resv = 0; |
| 154 | fadt->x_pm2_cnt_blk.addrl = 0x0; |
| 155 | fadt->x_pm2_cnt_blk.addrh = 0x0; |
| 156 | |
| 157 | |
| 158 | fadt->x_pm_tmr_blk.space_id = 1; |
| 159 | fadt->x_pm_tmr_blk.bit_width = 32; |
| 160 | fadt->x_pm_tmr_blk.bit_offset = 0; |
| 161 | fadt->x_pm_tmr_blk.resv = 0; |
| 162 | fadt->x_pm_tmr_blk.addrl = pm_base+0x08; |
| 163 | fadt->x_pm_tmr_blk.addrh = 0x0; |
| 164 | |
| 165 | |
| 166 | fadt->x_gpe0_blk.space_id = 1; |
| 167 | fadt->x_gpe0_blk.bit_width = 32; |
| 168 | fadt->x_gpe0_blk.bit_offset = 0; |
| 169 | fadt->x_gpe0_blk.resv = 0; |
| 170 | fadt->x_gpe0_blk.addrl = pm_base+0x20; |
| 171 | fadt->x_gpe0_blk.addrh = 0x0; |
| 172 | |
| 173 | |
| 174 | fadt->x_gpe1_blk.space_id = 1; |
| 175 | fadt->x_gpe1_blk.bit_width = 64; |
| 176 | fadt->x_gpe1_blk.bit_offset = 16; |
| 177 | fadt->x_gpe1_blk.resv = 0; |
| 178 | fadt->x_gpe1_blk.addrl = pm_base+0xb0; |
| 179 | fadt->x_gpe1_blk.addrh = 0x0; |
| 180 | |
| 181 | header->checksum = acpi_checksum((void *)fadt, sizeof(acpi_fadt_t)); |
| 182 | |
| 183 | } |