blob: a106f86ed69ebdda9b48d1e43bdcdbfd38b436a3 [file] [log] [blame]
Angel Pons89ab2502020-04-03 01:22:28 +02001/* SPDX-License-Identifier: GPL-2.0-only */
2/* This file is part of the coreboot project. */
Nicolas Reineckeb165c4a2015-07-04 23:37:06 +02003
4#include <arch/io.h>
5#include <console/console.h>
6#include <cpu/x86/smm.h>
7#include <southbridge/intel/ibexpeak/nvs.h>
8#include <southbridge/intel/common/pmutil.h>
Angel Pons95de2312020-02-17 13:08:53 +01009#include <northbridge/intel/ironlake/ironlake.h>
Nicolas Reineckeb165c4a2015-07-04 23:37:06 +020010#include <ec/acpi/ec.h>
11#include <ec/lenovo/h8/h8.h>
12#include <delay.h>
13#include "dock.h"
14
15#define GPE_EC_SCI 1
16#define GPE_EC_WAKE 13
17
18static void mainboard_smi_handle_ec_sci(void)
19{
20 u8 status = inb(EC_SC);
21 u8 event;
22
23 if (!(status & EC_SCI_EVT))
24 return;
25
26 event = ec_query();
27 printk(BIOS_DEBUG, "EC event %02x\n", event);
28
29 switch (event) {
30 case 0x18:
31 /* Fn-F9 key */
32 case 0x27:
33 /* Power loss */
34 case 0x50:
35 /* Undock Key */
36 ec_clr_bit(0x03, 2);
37 dock_disconnect();
38 break;
39 case 0x37:
40 case 0x58:
41 /* Dock Event */
42 ec_clr_bit(0x03, 2);
43 mdelay(250);
44 dock_connect();
45 ec_set_bit(0x03, 2);
46 /* set dock LED to indicate status */
47 ec_write(0x0c, 0x09);
48 ec_write(0x0c, 0x88);
49 break;
50 default:
51 break;
52 }
53}
54
55void mainboard_smi_gpi(u32 gpi_sts)
56{
57 if (gpi_sts & (1 << GPE_EC_SCI))
58 mainboard_smi_handle_ec_sci();
59}
60
61int mainboard_smi_apmc(u8 data)
62{
63 switch (data) {
64 case APM_CNT_ACPI_ENABLE:
65 /* use 0x1600/0x1604 to prevent races with userspace */
66 ec_set_ports(0x1604, 0x1600);
67 /* route H8SCI to SCI */
68 gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI);
69 /* discard all events, and enable attention */
70 ec_write(0x80, 0x01);
71 break;
72 case APM_CNT_ACPI_DISABLE:
73 /* we have to use port 0x62/0x66, as 0x1600/0x1604 doesn't
74 provide a EC query function */
75 ec_set_ports(0x66, 0x62);
76 /* route H8SCI# to SMI */
77 gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SMI);
78 /* discard all events, and enable attention */
79 ec_write(0x80, 0x01);
80 break;
81 default:
82 break;
83 }
84 return 0;
85}
86
87void mainboard_smi_sleep(u8 slp_typ)
88{
89 if (slp_typ == 3) {
90 u8 ec_wake = ec_read(0x32);
91 /* If EC wake events are enabled, enable wake on EC WAKE GPE. */
92 if (ec_wake & 0x14) {
93 /* Redirect EC WAKE GPE to SCI. */
94 gpi_route_interrupt(GPE_EC_WAKE, GPI_IS_SCI);
95 }
96 }
97}