Patrick Georgi | ac95903 | 2020-05-05 22:49:26 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 2 | |
| 3 | #include <intelblocks/gpio.h> |
| 4 | #include <intelblocks/pcr.h> |
| 5 | #include <soc/pcr_ids.h> |
| 6 | #include <soc/pmc.h> |
| 7 | |
| 8 | static const struct reset_mapping rst_map[] = { |
| 9 | { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 0U << 30 }, |
| 10 | { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 }, |
| 11 | { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 }, |
| 12 | }; |
| 13 | |
| 14 | static const struct reset_mapping rst_map_com0[] = { |
| 15 | { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30 }, |
| 16 | { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30 }, |
| 17 | { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30 }, |
| 18 | { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 3U << 30 }, |
| 19 | }; |
| 20 | |
Subrata Banik | da24535 | 2018-12-17 16:53:33 +0530 | [diff] [blame] | 21 | /* |
| 22 | * The GPIO driver for Icelake on Windows/Linux expects 32 GPIOs per pad |
| 23 | * group, regardless of whether or not there is a physical pad for each |
| 24 | * exposed GPIO number. |
| 25 | * |
| 26 | * This results in the OS having a sparse GPIO map, and devices that need |
| 27 | * to export an ACPI GPIO must use the OS expected number. |
| 28 | * |
| 29 | * Not all pins are usable as GPIO and those groups do not have a pad base. |
| 30 | * |
| 31 | * This layout matches the Linux kernel pinctrl map for CNL-LP at: |
| 32 | * linux/drivers/pinctrl/intel/pinctrl-icelake.c |
| 33 | */ |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 34 | static const struct pad_group icl_community0_groups[] = { |
Subrata Banik | da24535 | 2018-12-17 16:53:33 +0530 | [diff] [blame] | 35 | INTEL_GPP_BASE(GPP_G0, GPP_G0, GPP_G7, 0), /* GPP_G */ |
| 36 | INTEL_GPP_BASE(GPP_G0, GPP_B0, GPP_B23, 32), /* GPP_B */ |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 37 | INTEL_GPP(GPP_G0, GPIO_RSVD_0, GPIO_RSVD_1), |
Subrata Banik | da24535 | 2018-12-17 16:53:33 +0530 | [diff] [blame] | 38 | INTEL_GPP_BASE(GPP_G0, GPP_A0, GPP_A23, 64), /* GPP_A */ |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 39 | }; |
| 40 | |
| 41 | static const struct pad_group icl_community1_groups[] = { |
Subrata Banik | da24535 | 2018-12-17 16:53:33 +0530 | [diff] [blame] | 42 | INTEL_GPP_BASE(GPP_H0, GPP_H0, GPP_H23, 96), /* GPP_H */ |
| 43 | INTEL_GPP_BASE(GPP_H0, GPP_D0, GPIO_RSVD_2, 128), /* GPP_D */ |
| 44 | INTEL_GPP_BASE(GPP_H0, GPP_F0, GPP_F19, 160), /* GPP_F */ |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 45 | }; |
| 46 | |
Subrata Banik | da24535 | 2018-12-17 16:53:33 +0530 | [diff] [blame] | 47 | /* This community is not visible to the OS */ |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 48 | static const struct pad_group icl_community2_groups[] = { |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 49 | INTEL_GPP(GPD0, GPD0, GPD11), /* GPD */ |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 50 | }; |
| 51 | |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 52 | static const struct pad_group icl_community4_groups[] = { |
Subrata Banik | da24535 | 2018-12-17 16:53:33 +0530 | [diff] [blame] | 53 | INTEL_GPP_BASE(GPP_C0, GPP_C0, GPP_C23, 224), /* GPP_C */ |
Michael Niewöhner | 74da5f1 | 2021-09-16 19:12:38 +0200 | [diff] [blame] | 54 | INTEL_GPP(GPP_C0, EDP_BKLTEN, MLK_RST_B), /* HVCMOS */ |
Subrata Banik | da24535 | 2018-12-17 16:53:33 +0530 | [diff] [blame] | 55 | INTEL_GPP_BASE(GPP_C0, GPP_E0, GPP_E23, 256), /* GPP_E */ |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 56 | INTEL_GPP(GPP_C0, GPIO_RSVD_3, GPIO_RSVD_8), |
| 57 | }; |
| 58 | |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 59 | static const struct pad_group icl_community5_groups[] = { |
Subrata Banik | da24535 | 2018-12-17 16:53:33 +0530 | [diff] [blame] | 60 | INTEL_GPP_BASE(GPP_R0, GPP_R0, GPP_R7, 288), /* GPP_R */ |
| 61 | INTEL_GPP_BASE(GPP_C0, GPP_S0, GPP_S7, 320), /* GPP_S */ |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 62 | }; |
| 63 | |
Subrata Banik | dd5fa02 | 2019-05-15 21:04:37 +0530 | [diff] [blame] | 64 | static const struct pad_community icl_communities[TOTAL_GPIO_COMM] = { |
| 65 | /* GPP G, B, A */ |
| 66 | [COMM_0] = { |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 67 | .port = PID_GPIOCOM0, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 68 | .first_pad = GPP_G0, |
| 69 | .last_pad = GPP_A23, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 70 | .num_gpi_regs = NUM_GPIO_COM0_GPI_REGS, |
| 71 | .pad_cfg_base = PAD_CFG_BASE, |
| 72 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 73 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 74 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 75 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 76 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 85610d8 | 2020-11-23 22:02:20 +0100 | [diff] [blame] | 77 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 78 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 79 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 80 | .name = "GPP_GBA", |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 81 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 82 | .reset_map = rst_map_com0, |
| 83 | .num_reset_vals = ARRAY_SIZE(rst_map_com0), |
| 84 | .groups = icl_community0_groups, |
| 85 | .num_groups = ARRAY_SIZE(icl_community0_groups), |
Subrata Banik | dd5fa02 | 2019-05-15 21:04:37 +0530 | [diff] [blame] | 86 | }, |
| 87 | /* GPP H, D, F */ |
| 88 | [COMM_1] = { |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 89 | .port = PID_GPIOCOM1, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 90 | .first_pad = GPP_H0, |
| 91 | .last_pad = GPP_F19, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 92 | .num_gpi_regs = NUM_GPIO_COM1_GPI_REGS, |
| 93 | .pad_cfg_base = PAD_CFG_BASE, |
| 94 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 95 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 96 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 97 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 98 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 85610d8 | 2020-11-23 22:02:20 +0100 | [diff] [blame] | 99 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 100 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 101 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 102 | .name = "GPP_HDF", |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 103 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 104 | .reset_map = rst_map, |
| 105 | .num_reset_vals = ARRAY_SIZE(rst_map), |
| 106 | .groups = icl_community1_groups, |
| 107 | .num_groups = ARRAY_SIZE(icl_community1_groups), |
Subrata Banik | dd5fa02 | 2019-05-15 21:04:37 +0530 | [diff] [blame] | 108 | }, |
| 109 | /* GPD */ |
| 110 | [COMM_2] = { |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 111 | .port = PID_GPIOCOM2, |
| 112 | .first_pad = GPD0, |
| 113 | .last_pad = GPD11, |
| 114 | .num_gpi_regs = NUM_GPIO_COM2_GPI_REGS, |
| 115 | .pad_cfg_base = PAD_CFG_BASE, |
| 116 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 117 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 118 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 119 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 120 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 85610d8 | 2020-11-23 22:02:20 +0100 | [diff] [blame] | 121 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 122 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 123 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 124 | .name = "GPD", |
| 125 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 126 | .reset_map = rst_map, |
| 127 | .num_reset_vals = ARRAY_SIZE(rst_map), |
| 128 | .groups = icl_community2_groups, |
| 129 | .num_groups = ARRAY_SIZE(icl_community2_groups), |
Subrata Banik | dd5fa02 | 2019-05-15 21:04:37 +0530 | [diff] [blame] | 130 | }, |
| 131 | /* GPP C, E */ |
| 132 | [COMM_3] = { |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 133 | .port = PID_GPIOCOM4, |
| 134 | .first_pad = GPP_C0, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 135 | .last_pad = GPP_E23, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 136 | .num_gpi_regs = NUM_GPIO_COM4_GPI_REGS, |
| 137 | .pad_cfg_base = PAD_CFG_BASE, |
| 138 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 139 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 140 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 141 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 142 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 85610d8 | 2020-11-23 22:02:20 +0100 | [diff] [blame] | 143 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 144 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 145 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 146 | .name = "GPP_CE", |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 147 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 148 | .reset_map = rst_map, |
| 149 | .num_reset_vals = ARRAY_SIZE(rst_map), |
| 150 | .groups = icl_community4_groups, |
| 151 | .num_groups = ARRAY_SIZE(icl_community4_groups), |
Subrata Banik | dd5fa02 | 2019-05-15 21:04:37 +0530 | [diff] [blame] | 152 | }, |
| 153 | /* GPP R, S */ |
| 154 | [COMM_4] = { |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 155 | .port = PID_GPIOCOM5, |
| 156 | .first_pad = GPP_R0, |
| 157 | .last_pad = GPP_S7, |
| 158 | .num_gpi_regs = NUM_GPIO_COM5_GPI_REGS, |
| 159 | .pad_cfg_base = PAD_CFG_BASE, |
| 160 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 161 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 162 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 163 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 164 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 85610d8 | 2020-11-23 22:02:20 +0100 | [diff] [blame] | 165 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 166 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 167 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 168 | .name = "GPP_RS", |
| 169 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 170 | .reset_map = rst_map, |
| 171 | .num_reset_vals = ARRAY_SIZE(rst_map), |
| 172 | .groups = icl_community5_groups, |
| 173 | .num_groups = ARRAY_SIZE(icl_community5_groups), |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 174 | } |
| 175 | }; |
| 176 | |
| 177 | const struct pad_community *soc_gpio_get_community(size_t *num_communities) |
| 178 | { |
| 179 | *num_communities = ARRAY_SIZE(icl_communities); |
| 180 | return icl_communities; |
| 181 | } |
| 182 | |
| 183 | const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num) |
| 184 | { |
| 185 | static const struct pmc_to_gpio_route routes[] = { |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 186 | { PMC_GPP_G, GPP_G }, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 187 | { PMC_GPP_B, GPP_B }, |
| 188 | { PMC_GPP_A, GPP_A }, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 189 | { PMC_GPP_H, GPP_H }, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 190 | { PMC_GPP_D, GPP_D }, |
| 191 | { PMC_GPP_F, GPP_F }, |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 192 | { PMC_GPD, GPD }, |
Aamir Bohra | 6efa5c3 | 2018-11-06 11:37:44 +0530 | [diff] [blame] | 193 | { PMC_GPP_C, GPP_C }, |
| 194 | { PMC_GPP_E, GPP_E }, |
| 195 | { PMC_GPP_R, GPP_R }, |
| 196 | { PMC_GPP_S, GPP_S } |
| 197 | |
Aamir Bohra | 3ee54bb | 2018-10-17 11:55:01 +0530 | [diff] [blame] | 198 | }; |
| 199 | *num = ARRAY_SIZE(routes); |
| 200 | return routes; |
| 201 | } |