Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 1 | chip soc/intel/icelake |
| 2 | |
| 3 | device cpu_cluster 0 on |
| 4 | device lapic 0 on end |
| 5 | end |
| 6 | |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 7 | # GPE configuration |
| 8 | # Note that GPE events called out in ASL code rely on this |
| 9 | # route. i.e. If this route changes then the affected GPE |
| 10 | # offset bits also need to be changed. |
| 11 | register "gpe0_dw0" = "GPP_B" |
| 12 | register "gpe0_dw1" = "GPP_D" |
| 13 | register "gpe0_dw2" = "GPP_E" |
| 14 | |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 15 | # FSP configuration |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 16 | register "SaGv" = "SaGv_Enabled" |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 17 | register "SmbusEnable" = "1" |
| 18 | register "ScsEmmcHs400Enabled" = "1" |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 19 | register "SdCardPowerEnableActiveHigh" = "1" |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 20 | |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 21 | register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" # USB3/2 Type A port1 |
| 22 | register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # USB2 WWAN |
| 23 | register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # USB2 Bluetooth |
Aamir Bohra | 3e8eb32 | 2018-11-22 15:52:19 +0530 | [diff] [blame] | 24 | register "usb2_ports[3]" = "USB2_PORT_MID(OC0)" # Type-C Port1 |
| 25 | register "usb2_ports[4]" = "USB2_PORT_MID(OC0)" # Type-C Port2 |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 26 | register "usb2_ports[5]" = "USB2_PORT_MID(OC3)" # Type-C Port3 |
| 27 | register "usb2_ports[6]" = "USB2_PORT_MID(OC3)" # Type-C Port4 |
Aamir Bohra | 3e8eb32 | 2018-11-22 15:52:19 +0530 | [diff] [blame] | 28 | register "usb2_ports[7]" = "USB2_PORT_MID(OC0)" # USB3/2 Type A port2 |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 29 | register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # USB2 Type A port1 |
| 30 | register "usb2_ports[9]" = "USB2_PORT_MID(OC3)" # USB2 Type A port2 |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 31 | |
Aamir Bohra | 3e8eb32 | 2018-11-22 15:52:19 +0530 | [diff] [blame] | 32 | register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # USB3/2 Type A port1 |
| 33 | register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC0)" # USB3/2 Type A port2 |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 34 | register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3 WLAN |
| 35 | register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # UNUSED |
| 36 | register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # UNUSED |
| 37 | register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # UNUSED |
| 38 | |
| 39 | # Enable Pch iSCLK |
| 40 | register "pch_isclk" = "1" |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 41 | |
Aamir Bohra | 2fd2923 | 2018-11-21 11:08:04 +0530 | [diff] [blame] | 42 | # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f |
| 43 | register "gen1_dec" = "0x00fc0801" |
| 44 | register "gen2_dec" = "0x000c0201" |
| 45 | # EC memory map range is 0x900-0x9ff |
| 46 | register "gen3_dec" = "0x00fc0901" |
| 47 | |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 48 | register "PchHdaDspEnable" = "1" |
| 49 | register "PchHdaAudioLinkHda" = "1" |
| 50 | |
| 51 | register "PcieRpEnable[0]" = "1" |
| 52 | register "PcieRpEnable[1]" = "1" |
| 53 | register "PcieRpEnable[2]" = "1" |
| 54 | register "PcieRpEnable[3]" = "1" |
| 55 | register "PcieRpEnable[4]" = "1" |
| 56 | register "PcieRpEnable[5]" = "1" |
| 57 | register "PcieRpEnable[6]" = "1" |
| 58 | register "PcieRpEnable[7]" = "1" |
| 59 | register "PcieRpEnable[8]" = "1" |
| 60 | register "PcieRpEnable[9]" = "1" |
| 61 | register "PcieRpEnable[10]" = "1" |
| 62 | register "PcieRpEnable[11]" = "1" |
| 63 | register "PcieRpEnable[12]" = "1" |
| 64 | register "PcieRpEnable[13]" = "1" |
| 65 | register "PcieRpEnable[14]" = "1" |
| 66 | register "PcieRpEnable[15]" = "1" |
| 67 | |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 68 | register "PcieClkSrcUsage[0]" = "2" |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 69 | register "PcieClkSrcUsage[1]" = "8" |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 70 | register "PcieClkSrcUsage[2]" = "0xC" |
| 71 | register "PcieClkSrcUsage[3]" = "0x70" |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 72 | register "PcieClkSrcUsage[4]" = "4" |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 73 | register "PcieClkSrcUsage[5]" = "0xE" |
| 74 | register "PcieClkSrcUsage[6]" = "0x80" |
| 75 | register "PcieClkSrcUsage[7]" = "0x80" |
| 76 | register "PcieClkSrcUsage[8]" = "0x80" |
| 77 | register "PcieClkSrcUsage[9]" = "0x80" |
| 78 | register "PcieClkSrcUsage[10]" = "0x80" |
| 79 | register "PcieClkSrcUsage[11]" = "0x80" |
| 80 | register "PcieClkSrcUsage[12]" = "0x80" |
| 81 | register "PcieClkSrcUsage[13]" = "0x80" |
| 82 | register "PcieClkSrcUsage[14]" = "0x80" |
| 83 | register "PcieClkSrcUsage[15]" = "0x80" |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 84 | |
| 85 | register "PcieClkSrcClkReq[0]" = "0" |
| 86 | register "PcieClkSrcClkReq[1]" = "1" |
| 87 | register "PcieClkSrcClkReq[2]" = "2" |
| 88 | register "PcieClkSrcClkReq[3]" = "3" |
| 89 | register "PcieClkSrcClkReq[4]" = "4" |
| 90 | register "PcieClkSrcClkReq[5]" = "5" |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 91 | register "PcieClkSrcClkReq[6]" = "6" |
| 92 | register "PcieClkSrcClkReq[7]" = "7" |
| 93 | register "PcieClkSrcClkReq[8]" = "8" |
| 94 | register "PcieClkSrcClkReq[9]" = "9" |
| 95 | register "PcieClkSrcClkReq[10]" = "10" |
| 96 | register "PcieClkSrcClkReq[11]" = "11" |
| 97 | register "PcieClkSrcClkReq[12]" = "12" |
| 98 | register "PcieClkSrcClkReq[13]" = "13" |
| 99 | register "PcieClkSrcClkReq[14]" = "14" |
| 100 | register "PcieClkSrcClkReq[15]" = "15" |
| 101 | |
| 102 | register "SataEnable" = "1" |
| 103 | register "SataSalpSupport" = "1" |
| 104 | register "SataPortsEnable[0]" = "1" |
| 105 | register "SataPortsEnable[1]" = "1" |
| 106 | register "SataPortsEnable[2]" = "1" |
| 107 | register "SataPortsEnable[3]" = "1" |
| 108 | register "SataPortsEnable[4]" = "1" |
| 109 | register "SataPortsEnable[5]" = "1" |
| 110 | register "SataPortsEnable[6]" = "1" |
| 111 | register "SataPortsEnable[7]" = "1" |
| 112 | |
| 113 | register "SataPortsDevSlp[0]" = "1" |
| 114 | register "SataPortsDevSlp[1]" = "1" |
| 115 | register "SataPortsDevSlp[2]" = "1" |
| 116 | register "SataPortsDevSlp[3]" = "1" |
| 117 | register "SataPortsDevSlp[4]" = "1" |
| 118 | register "SataPortsDevSlp[5]" = "1" |
| 119 | register "SataPortsDevSlp[6]" = "1" |
| 120 | register "SataPortsDevSlp[7]" = "1" |
| 121 | |
| 122 | register "SerialIoI2cMode" = "{ |
| 123 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 124 | [PchSerialIoIndexI2C1] = PchSerialIoPci, |
| 125 | [PchSerialIoIndexI2C2] = PchSerialIoPci, |
| 126 | [PchSerialIoIndexI2C3] = PchSerialIoPci, |
| 127 | [PchSerialIoIndexI2C4] = PchSerialIoDisabled, |
| 128 | [PchSerialIoIndexI2C5] = PchSerialIoPci, |
| 129 | }" |
| 130 | |
| 131 | register "SerialIoGSpiMode" = "{ |
| 132 | [PchSerialIoIndexGSPI0] = PchSerialIoDisabled, |
| 133 | [PchSerialIoIndexGSPI1] = PchSerialIoPci, |
| 134 | [PchSerialIoIndexGSPI2] = PchSerialIoDisabled, |
| 135 | }" |
| 136 | |
| 137 | register "SerialIoGSpiCsMode" = "{ |
| 138 | [PchSerialIoIndexGSPI0] = 1, |
| 139 | [PchSerialIoIndexGSPI1] = 1, |
| 140 | [PchSerialIoIndexGSPI2] = 1, |
| 141 | }" |
| 142 | |
| 143 | register "SerialIoGSpiCsState" = "{ |
| 144 | [PchSerialIoIndexGSPI0] = 0, |
| 145 | [PchSerialIoIndexGSPI1] = 0, |
| 146 | [PchSerialIoIndexGSPI2] = 0, |
| 147 | }" |
| 148 | |
| 149 | register "SerialIoUartMode" = "{ |
| 150 | [PchSerialIoIndexUART0] = PchSerialIoDisabled, |
| 151 | [PchSerialIoIndexUART1] = PchSerialIoDisabled, |
| 152 | [PchSerialIoIndexUART2] = PchSerialIoSkipInit, |
| 153 | }" |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 154 | |
Sumeet Pawnikar | 01f96d7 | 2018-11-19 12:29:51 +0530 | [diff] [blame] | 155 | # Enable DPTF |
| 156 | register "dptf_enable" = "1" |
| 157 | |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 158 | # GPIO for SD card detect |
| 159 | register "sdcard_cd_gpio" = "GPP_G5" |
| 160 | |
| 161 | # Enable S0ix |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 162 | register "s0ix_enable" = "0" |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 163 | |
| 164 | # Intel Common SoC Config |
| 165 | #+-------------------+---------------------------+ |
| 166 | #| Field | Value | |
| 167 | #+-------------------+---------------------------+ |
Elyes HAOUAS | 17419ff | 2020-03-31 21:24:13 +0200 | [diff] [blame] | 168 | #| GSPI1 | cr50 TPM. Early init is | |
| 169 | #| | required to set up a BAR | |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 170 | #| | for TPM communication | |
Elyes HAOUAS | 17419ff | 2020-03-31 21:24:13 +0200 | [diff] [blame] | 171 | #| | before memory is up | |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 172 | #+-------------------+---------------------------+ |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 173 | |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 174 | register "common_soc_config" = "{ |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 175 | .gspi[1] = { |
| 176 | .speed_mhz = 1, |
| 177 | .early_init = 1, |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 178 | }, |
| 179 | }" |
| 180 | |
| 181 | device domain 0 on |
| 182 | device pci 00.0 on end # Host Bridge |
| 183 | device pci 02.0 on end # Integrated Graphics Device |
Elyes HAOUAS | 17419ff | 2020-03-31 21:24:13 +0200 | [diff] [blame] | 184 | device pci 04.0 off end # SA Thermal device |
| 185 | device pci 12.0 off end # Thermal Subsystem |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 186 | device pci 12.5 off end # UFS SCS |
| 187 | device pci 12.6 off end # GSPI #2 |
Aamir Bohra | 3e8eb32 | 2018-11-22 15:52:19 +0530 | [diff] [blame] | 188 | device pci 14.0 on |
| 189 | chip drivers/usb/acpi |
| 190 | register "desc" = ""Root Hub"" |
| 191 | register "type" = "UPC_TYPE_HUB" |
| 192 | device usb 0.0 on |
| 193 | chip drivers/usb/acpi |
| 194 | register "desc" = ""USB3/2 Type-A Left Lower"" |
| 195 | register "type" = "UPC_TYPE_A" |
| 196 | device usb 2.0 on end |
| 197 | end |
| 198 | chip drivers/usb/acpi |
| 199 | register "desc" = ""WWAN"" |
| 200 | register "type" = "UPC_TYPE_INTERNAL" |
| 201 | device usb 2.1 on end |
| 202 | end |
| 203 | chip drivers/usb/acpi |
| 204 | register "desc" = ""Bluetooth"" |
| 205 | register "type" = "UPC_TYPE_INTERNAL" |
| 206 | device usb 2.2 on end |
| 207 | end |
| 208 | chip drivers/usb/acpi |
| 209 | register "desc" = ""USB C Connector 1"" |
| 210 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 211 | device usb 2.3 on end |
| 212 | end |
| 213 | chip drivers/usb/acpi |
| 214 | register "desc" = ""USB C Connector 2"" |
| 215 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 216 | device usb 2.4 on end |
| 217 | end |
| 218 | chip drivers/usb/acpi |
| 219 | register "desc" = ""USB C Connector 3"" |
| 220 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 221 | device usb 2.5 on end |
| 222 | end |
| 223 | chip drivers/usb/acpi |
| 224 | register "desc" = ""USB C Connector 4"" |
| 225 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 226 | device usb 2.6 on end |
| 227 | end |
| 228 | chip drivers/usb/acpi |
| 229 | register "desc" = ""USB3/2 Type-A Left Upper"" |
| 230 | register "type" = "UPC_TYPE_A" |
| 231 | device usb 2.7 on end |
| 232 | end |
| 233 | chip drivers/usb/acpi |
| 234 | register "desc" = ""USB2 Type-A Right Lower"" |
| 235 | register "type" = "UPC_TYPE_A" |
| 236 | device usb 2.8 on end |
| 237 | end |
| 238 | chip drivers/usb/acpi |
| 239 | register "desc" = ""USB2 Type-A Right Upper"" |
| 240 | register "type" = "UPC_TYPE_A" |
| 241 | device usb 2.9 on end |
| 242 | end |
| 243 | chip drivers/usb/acpi |
| 244 | register "desc" = ""USB3/2 Type-A Left Lower"" |
| 245 | register "type" = "UPC_TYPE_A" |
| 246 | device usb 3.0 on end |
| 247 | end |
| 248 | chip drivers/usb/acpi |
| 249 | register "desc" = ""USB3/2 Type-A Left Upper"" |
| 250 | register "type" = "UPC_TYPE_A" |
| 251 | device usb 3.1 on end |
| 252 | end |
| 253 | chip drivers/usb/acpi |
| 254 | register "desc" = ""WLAN"" |
| 255 | register "type" = "UPC_TYPE_INTERNAL" |
| 256 | device usb 3.2 on end |
| 257 | end |
| 258 | chip drivers/usb/acpi |
| 259 | register "desc" = ""USB3 Port Unused1"" |
| 260 | register "type" = "UPC_TYPE_INTERNAL" |
| 261 | device usb 3.3 on end |
| 262 | end |
| 263 | chip drivers/usb/acpi |
| 264 | register "desc" = ""USB3 Port Unused2"" |
| 265 | register "type" = "UPC_TYPE_INTERNAL" |
| 266 | device usb 3.4 on end |
| 267 | end |
| 268 | chip drivers/usb/acpi |
| 269 | register "desc" = ""USB3 Port Unused3"" |
| 270 | register "type" = "UPC_TYPE_INTERNAL" |
| 271 | device usb 3.5 on end |
| 272 | end |
| 273 | end |
| 274 | end |
| 275 | end # USB xHCI |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 276 | device pci 14.1 off end # USB xDCI (OTG) |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 277 | device pci 14.2 off end # PMC SRAM |
Furquan Shaikh | edac4ef | 2020-10-09 08:50:14 -0700 | [diff] [blame] | 278 | device pci 14.3 on |
| 279 | chip drivers/wifi/generic |
| 280 | register "wake" = "GPE0_PME_B0" |
| 281 | device generic 0 on end |
| 282 | end |
| 283 | end # CNVi wifi |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 284 | device pci 14.5 on end # SDCard |
Aamir Bohra | 3032d76 | 2018-11-21 12:31:54 +0530 | [diff] [blame] | 285 | device pci 15.0 on |
| 286 | chip drivers/i2c/hid |
| 287 | register "generic.hid" = ""ALPS0000"" |
| 288 | register "generic.desc" = ""Touchpad"" |
| 289 | register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C8_IRQ)" |
| 290 | register "hid_desc_reg_offset" = "0x20" |
| 291 | device i2c 2c on end |
| 292 | end |
| 293 | end # I2C 0 |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 294 | device pci 15.1 on end # I2C #1 |
Elyes HAOUAS | 17419ff | 2020-03-31 21:24:13 +0200 | [diff] [blame] | 295 | device pci 15.2 on end # I2C #2 |
| 296 | device pci 15.3 on end # I2C #3 |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 297 | device pci 16.0 on end # Management Engine Interface 1 |
| 298 | device pci 16.1 off end # Management Engine Interface 2 |
| 299 | device pci 16.2 off end # Management Engine IDE-R |
| 300 | device pci 16.3 off end # Management Engine KT Redirection |
| 301 | device pci 16.4 off end # Management Engine Interface 3 |
| 302 | device pci 16.5 off end # Management Engine Interface 4 |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 303 | device pci 17.0 on end # SATA |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 304 | device pci 19.0 on end # I2C #4 |
| 305 | device pci 19.1 off end # I2C #5 |
| 306 | device pci 19.2 on end # UART #2 |
| 307 | device pci 1a.0 on end # eMMC |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 308 | device pci 1c.0 on |
Furquan Shaikh | a266d1e | 2020-10-04 12:52:54 -0700 | [diff] [blame] | 309 | chip drivers/wifi/generic |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 310 | register "wake" = "GPE0_PCI_EXP" |
| 311 | device pci 00.0 on end |
| 312 | end |
| 313 | end # PCI Express Port 1 x4 SLOT1 |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 314 | device pci 1c.4 on end # PCI Express Port 5 x1 SLOT2/LAN |
| 315 | device pci 1c.5 off end # PCI Express Port 6 |
| 316 | device pci 1c.6 off end # PCI Express Port 7 |
| 317 | device pci 1c.7 off end # PCI Express Port 8 |
| 318 | device pci 1d.0 on end # PCI Express Port 9 |
| 319 | device pci 1d.1 off end # PCI Express Port 10 |
| 320 | device pci 1d.2 off end # PCI Express Port 11 |
| 321 | device pci 1d.3 off end # PCI Express Port 12 |
| 322 | device pci 1d.4 off end # PCI Express Port 13 |
| 323 | device pci 1d.5 off end # PCI Express Port 14 |
| 324 | device pci 1d.6 off end # PCI Express Port 15 |
| 325 | device pci 1d.7 off end # PCI Express Port 16 |
| 326 | device pci 1e.0 on end # UART #0 |
| 327 | device pci 1e.1 off end # UART #1 |
| 328 | device pci 1e.2 off end # GSPI #0 |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 329 | device pci 1e.3 on |
| 330 | chip drivers/spi/acpi |
| 331 | register "hid" = "ACPI_DT_NAMESPACE_HID" |
| 332 | register "compat_string" = ""google,cr50"" |
| 333 | register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)" |
| 334 | device spi 0 on end |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 335 | end |
Aamir Bohra | df47e1c | 2018-07-01 00:13:29 +0530 | [diff] [blame] | 336 | end # GSPI #1 |
Elyes HAOUAS | 17419ff | 2020-03-31 21:24:13 +0200 | [diff] [blame] | 337 | device pci 1f.0 on end # eSPI Interface |
Aamir Bohra | 3c37b5a | 2018-06-29 22:33:25 +0530 | [diff] [blame] | 338 | device pci 1f.1 on end # P2SB |
| 339 | device pci 1f.2 on end # Power Management Controller |
| 340 | device pci 1f.3 on end # Intel HDA |
| 341 | device pci 1f.4 on end # SMBus |
| 342 | device pci 1f.5 on end # PCH SPI |
| 343 | device pci 1f.6 off end # GbE |
| 344 | end |
| 345 | end |