Lee Leahy | 87df8d0 | 2016-02-07 14:37:13 -0800 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2003 Eric Biederman |
| 5 | * Copyright (C) 2006-2010 coresystems GmbH |
| 6 | * Copyright (C) 2015-2016 Intel Corporation. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | |
| 18 | // Use simple device model for this file even in ramstage |
| 19 | #define __SIMPLE_DEVICE__ |
| 20 | |
| 21 | #include <console/uart.h> |
| 22 | #include <device/pci.h> |
| 23 | #include <device/pci_def.h> |
| 24 | #include <rules.h> |
| 25 | #include <soc/pci_devs.h> |
| 26 | |
| 27 | unsigned int uart_platform_refclk(void) |
| 28 | { |
| 29 | return 44236800; |
| 30 | } |
| 31 | |
| 32 | uintptr_t uart_platform_base(int idx) |
| 33 | { |
| 34 | /* HSUART controller #1 (B0:D20:F5). */ |
| 35 | device_t dev = PCI_DEV(0, HSUART1_DEV, HSUART1_FUNC); |
| 36 | |
| 37 | /* UART base address at BAR0(offset 0x10). */ |
| 38 | return (unsigned int) (pci_read_config32(dev, |
| 39 | PCI_BASE_ADDRESS_0) & ~0xfff); |
| 40 | } |