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Frank Vibrans420faca2011-02-14 18:42:12 +00001#
2# This file is part of the coreboot project.
3#
Frank Vibrans420faca2011-02-14 18:42:12 +00004#
5# This program is free software; you can redistribute it and/or modify
6# it under the terms of the GNU General Public License as published by
7# the Free Software Foundation; version 2 of the License.
8#
9# This program is distributed in the hope that it will be useful,
10# but WITHOUT ANY WARRANTY; without even the implied warranty of
11# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12# GNU General Public License for more details.
13#
Frank Vibrans420faca2011-02-14 18:42:12 +000014
Kyösti Mälkkif5bb4772012-03-16 15:15:20 +020015config NORTHBRIDGE_AMD_AGESA
Edward O'Callaghanb32e1f42014-11-21 02:44:34 +110016 bool
17 default CPU_AMD_AGESA
Kyösti Mälkkifb32be42017-04-12 04:31:54 +030018 select CBMEM_TOP_BACKUP
Kyösti Mälkkif5bb4772012-03-16 15:15:20 +020019
20if NORTHBRIDGE_AMD_AGESA
21
Mike Banone7f176c2020-01-19 21:42:09 +030022config BOTTOMIO_POSITION
23 hex "Bottom of 32-bit IO space"
24 default 0x80000000
25 help
26 If PCI peripherals with big BARs are connected to the system
27 the bottom of the IO must be decreased to allocate such devices.
28
29 Declare the beginning of the 128MB-aligned MMIO region. This
30 option is useful when PCI peripherals requesting large address
31 ranges are present, for example, graphic cards.
32
efdesign983f5ebd62011-09-14 13:47:17 -060033config CONSOLE_VGA_MULTI
34 bool
35 default n
36
zbaof7223732012-04-13 13:42:15 +080037config S3_VGA_ROM_RUN
38 bool
39 default n
40
Stefan Reinauera48ca842015-04-04 01:58:28 +020041source "src/northbridge/amd/agesa/*/Kconfig"
efdesign9805a89ab2011-06-20 17:38:49 -070042
Kyösti Mälkkieaee6e22014-04-30 01:35:29 +030043# TODO: Reservation for heap seems excessive
44config HEAP_SIZE
45 hex
46 default 0xc0000
47
Kyösti Mälkkif5bb4772012-03-16 15:15:20 +020048endif # NORTHBRIDGE_AMD_AGESA