| Stefan Tauner | bef3d34 | 2012-10-13 13:15:04 +0200 | [diff] [blame] | 1 | config CPU_INTEL_SOCKET_LGA775 |
| 2 | bool |
| 3 | |
| 4 | if CPU_INTEL_SOCKET_LGA775 |
| 5 | |
| Elyes HAOUAS | 00b5f53 | 2021-02-01 09:45:08 +0100 | [diff] [blame] | 6 | config SOCKET_SPECIFIC_OPTIONS |
| Stefan Tauner | bef3d34 | 2012-10-13 13:15:04 +0200 | [diff] [blame] | 7 | def_bool y |
| Stefan Tauner | bef3d34 | 2012-10-13 13:15:04 +0200 | [diff] [blame] | 8 | select CPU_INTEL_MODEL_6FX |
| 9 | select CPU_INTEL_MODEL_F3X |
| 10 | select CPU_INTEL_MODEL_F4X |
| Stefan Tauner | bef3d34 | 2012-10-13 13:15:04 +0200 | [diff] [blame] | 11 | select CPU_INTEL_MODEL_1067X |
| Stefan Tauner | bef3d34 | 2012-10-13 13:15:04 +0200 | [diff] [blame] | 12 | select SIPI_VECTOR_IN_ROM |
| 13 | |
| 14 | config DCACHE_RAM_SIZE |
| 15 | hex |
| Elyes HAOUAS | 985821c | 2021-01-05 14:38:57 +0100 | [diff] [blame] | 16 | default 0x8000 # 32 kB |
| Stefan Tauner | bef3d34 | 2012-10-13 13:15:04 +0200 | [diff] [blame] | 17 | |
| Arthur Heymans | 7843bd5 | 2019-11-11 21:56:37 +0100 | [diff] [blame] | 18 | config DCACHE_BSP_STACK_SIZE |
| 19 | hex |
| 20 | default 0x2000 |
| 21 | |
| Stefan Tauner | bef3d34 | 2012-10-13 13:15:04 +0200 | [diff] [blame] | 22 | config DCACHE_RAM_BASE |
| 23 | hex |
| Arthur Heymans | 93cb180 | 2021-01-28 12:20:42 +0100 | [diff] [blame] | 24 | default 0xfeff8000 # 4GB - 16MB - DCACHE_RAM_SIZE |
| Stefan Tauner | bef3d34 | 2012-10-13 13:15:04 +0200 | [diff] [blame] | 25 | |
| 26 | endif # CPU_INTEL_SOCKET_LGA775 |