| Angel Pons | f23ae0b | 2020-04-02 23:48:12 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 2 | |
| Michael Niewöhner | 90df916 | 2020-10-13 22:58:28 +0200 | [diff] [blame] | 3 | #include <types.h> |
| Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 4 | #include <cpu/x86/msr.h> |
| Elyes HAOUAS | 45ce5d8 | 2021-01-31 09:15:30 +0100 | [diff] [blame] | 5 | |
| Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 6 | #include "model_206ax.h" |
| 7 | |
| Alexander Couzens | f251a6d | 2015-01-28 01:51:04 +0100 | [diff] [blame] | 8 | /* MSR Documentation based on |
| 9 | * "Sandy Bridge Processor Family BIOS Writer's Guide (BWG)" |
| 10 | * Document Number 504790 |
| 11 | * Revision 1.6.0, June 2012 */ |
| 12 | |
| Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 13 | void intel_model_206ax_finalize_smm(void) |
| 14 | { |
| Elyes HAOUAS | ece2696 | 2018-08-07 12:24:16 +0200 | [diff] [blame] | 15 | /* Lock TM interrupts - route thermal events to all processors */ |
| Michael Niewöhner | 90df916 | 2020-10-13 22:58:28 +0200 | [diff] [blame] | 16 | msr_set(MSR_MISC_PWR_MGMT, BIT(22)); |
| Alexander Couzens | f251a6d | 2015-01-28 01:51:04 +0100 | [diff] [blame] | 17 | |
| 18 | /* Lock memory configuration to protect SMM */ |
| Michael Niewöhner | 90df916 | 2020-10-13 22:58:28 +0200 | [diff] [blame] | 19 | msr_set(MSR_LT_LOCK_MEMORY, BIT(0)); |
| Stefan Reinauer | 5c55463 | 2012-04-04 00:09:50 +0200 | [diff] [blame] | 20 | } |