Hannah Williams | 85e3c77 | 2016-05-25 11:12:43 -0700 | [diff] [blame^] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
Hannah Williams | 1cdce27c | 2016-04-05 10:03:38 -0700 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2016 Intel Corporation. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | /* XHCI Controller 0:15.0 */ |
Hannah Williams | 85e3c77 | 2016-05-25 11:12:43 -0700 | [diff] [blame^] | 17 | Device (XHC1) { |
| 18 | Name (_ADR, 0x00150000) /* Device 21, Function 0 */ |
Hannah Williams | 1cdce27c | 2016-04-05 10:03:38 -0700 | [diff] [blame] | 19 | |
| 20 | Name (_S3D, 3) /* D3 supported in S3 */ |
| 21 | Name (_S0W, 3) /* D3 can wake device in S0 */ |
| 22 | Name (_S3W, 3) /* D3 can wake system from S3 */ |
| 23 | |
Hannah Williams | 85e3c77 | 2016-05-25 11:12:43 -0700 | [diff] [blame^] | 24 | /* Declare XHCI GPE status and enable bits are bit 13 */ |
Hannah Williams | 1cdce27c | 2016-04-05 10:03:38 -0700 | [diff] [blame] | 25 | Name (_PRW, Package() { GPE0A_XHCI_PME_STS, 3 }) |
| 26 | |
Hannah Williams | 85e3c77 | 2016-05-25 11:12:43 -0700 | [diff] [blame^] | 27 | Method (_STA, 0) |
Hannah Williams | 1cdce27c | 2016-04-05 10:03:38 -0700 | [diff] [blame] | 28 | { |
| 29 | Return (0xF) |
| 30 | } |
Hannah Williams | 1cdce27c | 2016-04-05 10:03:38 -0700 | [diff] [blame] | 31 | } |