Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2013 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #include <stddef.h> |
| 21 | #include <arch/io.h> |
| 22 | #include <cbfs.h> |
| 23 | #include <cbmem.h> |
| 24 | #include <console/console.h> |
| 25 | #include <device/pci_def.h> |
| 26 | #include <baytrail/gpio.h> |
| 27 | #include <baytrail/mrc_cache.h> |
| 28 | #include <baytrail/iomap.h> |
| 29 | #include <baytrail/pci_devs.h> |
| 30 | #include <baytrail/romstage.h> |
| 31 | |
| 32 | |
| 33 | static void enable_smbus(void) |
| 34 | { |
| 35 | uint32_t reg; |
| 36 | const uint32_t smbus_dev = PCI_DEV(0, SMBUS_DEV, SMBUS_FUNC); |
| 37 | |
| 38 | /* SMBus I/O BAR */ |
| 39 | reg = SMBUS_BASE_ADDRESS | 2; |
| 40 | pci_write_config32(smbus_dev, PCI_BASE_ADDRESS_4, reg); |
| 41 | /* Enable decode of I/O space. */ |
| 42 | reg = pci_read_config16(smbus_dev, PCI_COMMAND); |
| 43 | reg |= 0x1; |
| 44 | pci_write_config16(smbus_dev, PCI_COMMAND, reg); |
| 45 | /* Enable Host Controller */ |
| 46 | reg = pci_read_config8(smbus_dev, 0x40); |
| 47 | reg |= 1; |
| 48 | pci_write_config8(smbus_dev, 0x40, reg); |
| 49 | |
| 50 | /* Configure pads to be used for SMBus */ |
| 51 | score_select_func(PCU_SMB_CLK_PAD, 1); |
| 52 | score_select_func(PCU_SMB_DATA_PAD, 1); |
| 53 | } |
| 54 | |
Aaron Durbin | 833ff35 | 2013-10-02 11:06:31 -0500 | [diff] [blame^] | 55 | static void ABI_X86 send_to_console(unsigned char b) |
| 56 | { |
| 57 | console_tx_byte(b); |
| 58 | } |
| 59 | |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 60 | void raminit(struct mrc_params *mp, int prev_sleep_state) |
| 61 | { |
| 62 | int ret; |
| 63 | mrc_wrapper_entry_t mrc_entry; |
| 64 | const struct mrc_saved_data *cache; |
| 65 | |
| 66 | /* Fill in default entries. */ |
| 67 | mp->version = MRC_PARAMS_VER; |
Aaron Durbin | 833ff35 | 2013-10-02 11:06:31 -0500 | [diff] [blame^] | 68 | mp->console_out = &send_to_console; |
Aaron Durbin | 9a7d7bc | 2013-09-07 00:41:48 -0500 | [diff] [blame] | 69 | mp->prev_sleep_state = prev_sleep_state; |
| 70 | |
| 71 | if (!mrc_cache_get_current(&cache)) { |
| 72 | mp->saved_data_size = cache->size; |
| 73 | mp->saved_data = &cache->data[0]; |
| 74 | } else { |
| 75 | printk(BIOS_DEBUG, "No MRC cache found.\n"); |
| 76 | } |
| 77 | |
| 78 | mrc_entry = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "mrc.bin", 0xab, |
| 79 | NULL); |
| 80 | |
| 81 | if (mrc_entry == NULL) { |
| 82 | printk(BIOS_DEBUG, "Couldn't find mrc.bin\n"); |
| 83 | return; |
| 84 | } |
| 85 | if (mp->mainboard.dram_info_location == DRAM_INFO_SPD_SMBUS) |
| 86 | enable_smbus(); |
| 87 | |
| 88 | ret = mrc_entry(mp); |
| 89 | |
| 90 | cbmem_initialize_empty(); |
| 91 | |
| 92 | printk(BIOS_DEBUG, "MRC Wrapper returned %d\n", ret); |
| 93 | printk(BIOS_DEBUG, "MRC data at %p %d bytes\n", mp->data_to_save, |
| 94 | mp->data_to_save_size); |
| 95 | |
| 96 | if (mp->data_to_save != NULL && mp->data_to_save_size > 0) |
| 97 | mrc_cache_stash_data(mp->data_to_save, mp->data_to_save_size); |
| 98 | } |