Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 1 | chip soc/intel/cannonlake |
Sumeet R Pawnikar | 309ccf7 | 2020-05-09 16:37:30 +0530 | [diff] [blame] | 2 | register "power_limits_config" = "{ |
| 3 | .tdp_pl1_override = 15, |
| 4 | .tdp_pl2_override = 51, |
| 5 | }" |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 6 | |
| 7 | register "SerialIoDevMode" = "{ |
| 8 | [PchSerialIoIndexI2C0] = PchSerialIoPci, |
| 9 | [PchSerialIoIndexI2C1] = PchSerialIoPci, |
Matt DeVillier | 830b0ac | 2023-10-22 17:09:07 -0500 | [diff] [blame^] | 10 | [PchSerialIoIndexI2C2] = PchSerialIoDisabled, |
| 11 | [PchSerialIoIndexI2C3] = PchSerialIoDisabled, |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 12 | [PchSerialIoIndexI2C4] = PchSerialIoPci, |
Matt DeVillier | 830b0ac | 2023-10-22 17:09:07 -0500 | [diff] [blame^] | 13 | [PchSerialIoIndexI2C5] = PchSerialIoDisabled, |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 14 | [PchSerialIoIndexSPI0] = PchSerialIoPci, |
| 15 | [PchSerialIoIndexSPI1] = PchSerialIoPci, |
| 16 | [PchSerialIoIndexSPI2] = PchSerialIoDisabled, |
| 17 | [PchSerialIoIndexUART0] = PchSerialIoSkipInit, |
| 18 | [PchSerialIoIndexUART1] = PchSerialIoDisabled, |
| 19 | [PchSerialIoIndexUART2] = PchSerialIoDisabled, |
| 20 | }" |
| 21 | |
| 22 | # Intel Common SoC Config |
| 23 | #+-------------------+---------------------------+ |
| 24 | #| Field | Value | |
| 25 | #+-------------------+---------------------------+ |
| 26 | #| GSPI0 | cr50 TPM. Early init is | |
| 27 | #| | required to set up a BAR | |
| 28 | #| | for TPM communication | |
| 29 | #| | before memory is up | |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 30 | #| I2C0 | Touchpad | |
| 31 | #| I2C1 | Touch screen | |
| 32 | #| I2C4 | Audio | |
| 33 | #+-------------------+---------------------------+ |
| 34 | register "common_soc_config" = "{ |
| 35 | .gspi[0] = { |
| 36 | .speed_mhz = 1, |
| 37 | .early_init = 1, |
| 38 | }, |
| 39 | .i2c[0] = { |
| 40 | .speed = I2C_SPEED_FAST, |
David Wu | 6de7ecb | 2019-12-19 17:20:53 +0800 | [diff] [blame] | 41 | .rise_time_ns = 50, |
| 42 | .fall_time_ns = 15, |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 43 | }, |
| 44 | .i2c[1] = { |
| 45 | .speed = I2C_SPEED_FAST, |
David Wu | 6de7ecb | 2019-12-19 17:20:53 +0800 | [diff] [blame] | 46 | .rise_time_ns = 60, |
| 47 | .fall_time_ns = 25, |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 48 | }, |
| 49 | .i2c[4] = { |
| 50 | .speed = I2C_SPEED_FAST, |
David Wu | 6de7ecb | 2019-12-19 17:20:53 +0800 | [diff] [blame] | 51 | .rise_time_ns = 60, |
| 52 | .fall_time_ns = 60, |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 53 | }, |
| 54 | }" |
| 55 | |
| 56 | # GPIO for SD card detect |
| 57 | register "sdcard_cd_gpio" = "vSD3_CD_B" |
| 58 | |
David Wu | 21f1ccc | 2019-06-19 20:09:17 +0800 | [diff] [blame] | 59 | # Enable eMMC HS400 |
| 60 | register "ScsEmmcHs400Enabled" = "1" |
| 61 | |
Jamie Chen | fdd0e9b | 2019-08-23 13:15:36 +0800 | [diff] [blame] | 62 | # EMMC Tx CMD Delay |
| 63 | # Refer to EDS-Vol2-14.3.7. |
| 64 | # [14:8] steps of delay for DDR mode, each 125ps, range: 0 - 39. |
| 65 | # [6:0] steps of delay for SDR mode, each 125ps, range: 0 - 39. |
| 66 | register "common_soc_config.emmc_dll.emmc_tx_cmd_cntl" = "0x505" |
| 67 | |
| 68 | # EMMC TX DATA Delay 1 |
| 69 | # Refer to EDS-Vol2-14.3.8. |
| 70 | # [14:8] steps of delay for HS400, each 125ps, range: 0 - 78. |
| 71 | # [6:0] steps of delay for SDR104/HS200, each 125ps, range: 0 - 79. |
Jamie Chen | ce6f1a5 | 2019-10-16 13:47:15 +0800 | [diff] [blame] | 72 | register "common_soc_config.emmc_dll.emmc_tx_data_cntl1" = "0x911" |
Jamie Chen | fdd0e9b | 2019-08-23 13:15:36 +0800 | [diff] [blame] | 73 | |
| 74 | # EMMC TX DATA Delay 2 |
| 75 | # Refer to EDS-Vol2-14.3.9. |
| 76 | # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 79. |
| 77 | # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. |
| 78 | # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 -79. |
| 79 | # [6:0] steps of delay for SDR12, each 125ps. Range: 0 - 79. |
Jamie Chen | ce6f1a5 | 2019-10-16 13:47:15 +0800 | [diff] [blame] | 80 | register "common_soc_config.emmc_dll.emmc_tx_data_cntl2" = "0x1C262828" |
Jamie Chen | fdd0e9b | 2019-08-23 13:15:36 +0800 | [diff] [blame] | 81 | |
| 82 | # EMMC RX CMD/DATA Delay 1 |
| 83 | # Refer to EDS-Vol2-14.3.10. |
| 84 | # [30:24] steps of delay for SDR50, each 125ps, range: 0 - 119. |
| 85 | # [22:16] steps of delay for DDR50, each 125ps, range: 0 - 78. |
| 86 | # [14:8] steps of delay for SDR25/HS50, each 125ps, range: 0 - 119. |
| 87 | # [6:0] steps of delay for SDR12, each 125ps, range: 0 - 119. |
Jamie Chen | ce6f1a5 | 2019-10-16 13:47:15 +0800 | [diff] [blame] | 88 | register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl1" = "0x1C16583b" |
Jamie Chen | fdd0e9b | 2019-08-23 13:15:36 +0800 | [diff] [blame] | 89 | |
| 90 | # EMMC RX CMD/DATA Delay 2 |
| 91 | # Refer to EDS-Vol2-14.3.12. |
| 92 | # [17:16] stands for Rx Clock before Output Buffer, |
| 93 | # 00: Rx clock after output buffer, |
| 94 | # 01: Rx clock before output buffer, |
| 95 | # 10: Automatic selection based on working mode. |
| 96 | # 11: Reserved |
| 97 | # [14:8] steps of delay for Auto Tuning Mode, each 125ps, range: 0 - 39. |
| 98 | # [6:0] steps of delay for HS200, each 125ps, range: 0 - 79. |
Jamie Chen | ce6f1a5 | 2019-10-16 13:47:15 +0800 | [diff] [blame] | 99 | register "common_soc_config.emmc_dll.emmc_rx_cmd_data_cntl2" = "0x1001D" |
Jamie Chen | fdd0e9b | 2019-08-23 13:15:36 +0800 | [diff] [blame] | 100 | |
| 101 | # EMMC Rx Strobe Delay |
| 102 | # Refer to EDS-Vol2-14.3.11. |
| 103 | # [14:8] Rx Strobe Delay DLL 1(HS400 Mode), each 125ps, range: 0 - 39. |
| 104 | # [6:0] Rx Strobe Delay DLL 2(HS400 Mode), each 125ps, range: 0 - 39. |
Jamie Chen | ce6f1a5 | 2019-10-16 13:47:15 +0800 | [diff] [blame] | 105 | register "common_soc_config.emmc_dll.emmc_rx_strobe_cntl" = "0x1515" |
Jamie Chen | fdd0e9b | 2019-08-23 13:15:36 +0800 | [diff] [blame] | 106 | |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 107 | device domain 0 on |
Matt DeVillier | c70fbb0 | 2023-10-22 18:09:30 -0500 | [diff] [blame] | 108 | device ref igpu on |
Matt DeVillier | c5a3a4a | 2020-06-07 04:05:55 -0500 | [diff] [blame] | 109 | register "gfx" = "GMA_DEFAULT_PANEL(0)" |
| 110 | end |
Matt DeVillier | c70fbb0 | 2023-10-22 18:09:30 -0500 | [diff] [blame] | 111 | device ref sdxc on end |
| 112 | device ref i2c0 on |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 113 | chip drivers/i2c/generic |
| 114 | register "hid" = ""ELAN0000"" |
| 115 | register "desc" = ""ELAN Touchpad"" |
Matt DeVillier | 251d443 | 2022-12-18 18:47:20 -0600 | [diff] [blame] | 116 | register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A21_IRQ)" |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 117 | register "wake" = "GPE0_DW0_21" |
Matt DeVillier | 2cf52d8 | 2022-09-01 15:09:24 -0500 | [diff] [blame] | 118 | register "detect" = "1" |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 119 | device i2c 15 on end |
| 120 | end |
David Wu | 5526e68 | 2019-06-21 15:33:52 +0800 | [diff] [blame] | 121 | chip drivers/i2c/hid |
Matt DeVillier | 148207a | 2022-12-19 15:14:34 -0600 | [diff] [blame] | 122 | register "generic.hid" = ""SYNA0000"" |
| 123 | register "generic.cid" = ""ACPI0C50"" |
David Wu | 5526e68 | 2019-06-21 15:33:52 +0800 | [diff] [blame] | 124 | register "generic.desc" = ""Synaptics Touchpad"" |
Karthikeyan Ramasubramanian | 86dc4b7 | 2020-11-10 13:46:26 -0700 | [diff] [blame] | 125 | register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_A21_IRQ)" |
David Wu | 5526e68 | 2019-06-21 15:33:52 +0800 | [diff] [blame] | 126 | register "generic.wake" = "GPE0_DW0_21" |
Matt DeVillier | 2cf52d8 | 2022-09-01 15:09:24 -0500 | [diff] [blame] | 127 | register "generic.detect" = "1" |
David Wu | 5526e68 | 2019-06-21 15:33:52 +0800 | [diff] [blame] | 128 | register "hid_desc_reg_offset" = "0x20" |
| 129 | device i2c 0x2c on end |
| 130 | end |
Matt DeVillier | c70fbb0 | 2023-10-22 18:09:30 -0500 | [diff] [blame] | 131 | end |
| 132 | device ref i2c1 on |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 133 | chip drivers/i2c/generic |
| 134 | register "hid" = ""ELAN0001"" |
| 135 | register "desc" = ""ELAN Touchscreen"" |
Matt DeVillier | 251d443 | 2022-12-18 18:47:20 -0600 | [diff] [blame] | 136 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D16_IRQ)" |
Matt DeVillier | c5ec497 | 2022-12-18 20:13:28 -0600 | [diff] [blame] | 137 | register "detect" = "1" |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 138 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" |
| 139 | register "reset_delay_ms" = "100" |
| 140 | register "reset_off_delay_ms" = "5" |
Philip Chen | f6f4a8f | 2019-08-22 20:10:21 -0700 | [diff] [blame] | 141 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)" |
| 142 | register "enable_delay_ms" = "10" |
| 143 | register "enable_off_delay_ms" = "1" |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 144 | register "has_power_resource" = "1" |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 145 | device i2c 49 on end |
| 146 | end |
David Wu | 3a2660e | 2019-06-28 09:23:48 +0800 | [diff] [blame] | 147 | chip drivers/i2c/generic |
| 148 | register "hid" = ""RAYD0001"" |
| 149 | register "desc" = ""Raydium Touchscreen"" |
Matt DeVillier | 251d443 | 2022-12-18 18:47:20 -0600 | [diff] [blame] | 150 | register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D16_IRQ)" |
Matt DeVillier | c5ec497 | 2022-12-18 20:13:28 -0600 | [diff] [blame] | 151 | register "detect" = "1" |
David Wu | 3a2660e | 2019-06-28 09:23:48 +0800 | [diff] [blame] | 152 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" |
| 153 | register "reset_delay_ms" = "1" |
| 154 | register "reset_off_delay_ms" = "2" |
Philip Chen | f6f4a8f | 2019-08-22 20:10:21 -0700 | [diff] [blame] | 155 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)" |
| 156 | register "enable_delay_ms" = "10" |
| 157 | register "enable_off_delay_ms" = "1" |
David Wu | 3a2660e | 2019-06-28 09:23:48 +0800 | [diff] [blame] | 158 | register "has_power_resource" = "1" |
| 159 | device i2c 39 on end |
| 160 | end |
David Wu | d492f01 | 2019-11-26 19:16:25 +0800 | [diff] [blame] | 161 | chip drivers/i2c/hid |
| 162 | register "generic.hid" = ""ELAN9004"" |
| 163 | register "generic.desc" = ""ELAN Touchscreen"" |
Karthikeyan Ramasubramanian | 86dc4b7 | 2020-11-10 13:46:26 -0700 | [diff] [blame] | 164 | register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_D16_IRQ)" |
Matt DeVillier | c5ec497 | 2022-12-18 20:13:28 -0600 | [diff] [blame] | 165 | register "generic.detect" = "1" |
David Wu | d492f01 | 2019-11-26 19:16:25 +0800 | [diff] [blame] | 166 | register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" |
| 167 | register "generic.reset_delay_ms" = "20" |
| 168 | register "generic.reset_off_delay_ms" = "2" |
| 169 | register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D9)" |
| 170 | register "generic.enable_delay_ms" = "10" |
| 171 | register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C4)" |
| 172 | register "generic.stop_delay_ms" = "300" |
| 173 | register "generic.has_power_resource" = "1" |
| 174 | register "hid_desc_reg_offset" = "0x01" |
| 175 | device i2c 10 on end |
| 176 | end |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 177 | chip drivers/generic/gpio_keys |
| 178 | register "name" = ""PENH"" |
| 179 | register "gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A8)" |
Furquan Shaikh | fa8b75f | 2020-06-26 01:19:46 -0700 | [diff] [blame] | 180 | register "key.wake_gpe" = "GPE0_DW0_08" |
| 181 | register "key.wakeup_route" = "WAKEUP_ROUTE_SCI" |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 182 | register "key.wakeup_event_action" = "EV_ACT_ASSERTED" |
| 183 | register "key.dev_name" = ""EJCT"" |
| 184 | register "key.linux_code" = "SW_PEN_INSERTED" |
| 185 | register "key.linux_input_type" = "EV_SW" |
| 186 | register "key.label" = ""pen_eject"" |
| 187 | device generic 0 on end |
| 188 | end |
| 189 | end # I2C #1 |
Matt DeVillier | c70fbb0 | 2023-10-22 18:09:30 -0500 | [diff] [blame] | 190 | device ref i2c4 on |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 191 | chip drivers/i2c/generic |
| 192 | register "hid" = ""10EC5682"" |
| 193 | register "name" = ""RT58"" |
| 194 | register "desc" = ""Realtek RT5682"" |
| 195 | register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)" |
| 196 | register "property_count" = "1" |
| 197 | # Set the jd_src to RT5668_JD1 for jack detection |
| 198 | register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" |
| 199 | register "property_list[0].name" = ""realtek,jd-src"" |
| 200 | register "property_list[0].integer" = "1" |
| 201 | device i2c 1a on end |
| 202 | end |
Matt DeVillier | c70fbb0 | 2023-10-22 18:09:30 -0500 | [diff] [blame] | 203 | end |
| 204 | device ref emmc on end |
| 205 | device ref hda on |
Edward O'Callaghan | b417786 | 2019-12-23 18:14:23 +1100 | [diff] [blame] | 206 | chip drivers/generic/max98357a |
Aamir Bohra | a1c82c5 | 2020-03-16 18:57:48 +0530 | [diff] [blame] | 207 | register "hid" = ""MX98357A"" |
Edward O'Callaghan | b417786 | 2019-12-23 18:14:23 +1100 | [diff] [blame] | 208 | register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H3)" |
| 209 | register "sdmode_delay" = "5" |
| 210 | device generic 0 on end |
| 211 | end |
Matt DeVillier | 10e92831 | 2023-01-17 11:24:25 -0600 | [diff] [blame] | 212 | chip drivers/sof |
| 213 | register "spkr_tplg" = "max98357a" |
| 214 | register "jack_tplg" = "rt5682" |
| 215 | register "mic_tplg" = "_2ch_pdm0" |
| 216 | device generic 0 on end |
| 217 | end |
Matt DeVillier | c70fbb0 | 2023-10-22 18:09:30 -0500 | [diff] [blame] | 218 | end |
Paul Fagerburg | 7fa3d56 | 2019-05-21 14:54:26 -0600 | [diff] [blame] | 219 | end |
| 220 | |
| 221 | end |