blob: 7cfc62bb3dc3347f2c275f126ab0cd527e997d3c [file] [log] [blame]
Tim Crawford8093b77c2024-05-29 16:31:17 -06001# SPDX-License-Identifier: GPL-2.0-only
2
Tim Crawford94594602021-08-06 13:11:18 -06003chip soc/intel/tigerlake
Tim Crawford94594602021-08-06 13:11:18 -06004 # Power limits
5 register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{
6 .tdp_pl1_override = 28,
7 .tdp_pl2_override = 51,
8 }"
9 register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{
10 .tdp_pl1_override = 28,
11 .tdp_pl2_override = 51,
12 }"
13
Tim Crawford94594602021-08-06 13:11:18 -060014 # GPE configuration
15 register "pmc_gpe0_dw0" = "PMC_GPP_A"
16 register "pmc_gpe0_dw1" = "PMC_GPP_R"
17 register "pmc_gpe0_dw2" = "PMC_GPD"
18
Tim Crawford94594602021-08-06 13:11:18 -060019 device domain 0 on
20 subsystemid 0x1558 0x4018 inherit
21
Tim Crawford94594602021-08-06 13:11:18 -060022 device ref peg on
23 # PCIe PEG0 x4, Clock 0 (SSD1)
24 register "PcieClkSrcUsage[0]" = "0x40"
25 register "PcieClkSrcClkReq[0]" = "0"
26 chip soc/intel/common/block/pcie/rtd3
27 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD1_PWR_DN#
28 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)" # GPP_H0_RTD3
Tim Crawford2a404b52022-01-07 14:12:34 -070029 register "srcclk_pin" = "0" # SSD1_CLKREQ#
Tim Crawford94594602021-08-06 13:11:18 -060030 device generic 0 on end
31 end
32 end
Tim Crawford94594602021-08-06 13:11:18 -060033 device ref north_xhci on # J_TYPEC2
34 register "UsbTcPortEn" = "1"
35 register "TcssXhciEn" = "1"
36 chip drivers/usb/acpi
37 device ref tcss_root_hub on
38 chip drivers/usb/acpi
39 register "desc" = ""USB3 J_TYPEC2""
40 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
41 register "group" = "ACPI_PLD_GROUP(1, 1)"
42 device ref tcss_usb3_port1 on end
43 end
44 end
45 end
46 end
47 device ref tbt_dma0 on # J_TYPEC2
48 chip drivers/intel/usb4/retimer
49 register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)"
50 use tcss_usb3_port1 as dfp[0].typec_port
51 device generic 0 on end
52 end
53 end
54
Tim Crawford94594602021-08-06 13:11:18 -060055 device ref south_xhci on
Felix Singeree1fd542023-10-26 15:42:16 +020056 register "usb2_ports" = "{
57 [0] = USB2_PORT_MID(OC_SKIP), /* J_USB3_2 */
58 [1] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 */
59 [2] = USB2_PORT_MID(OC_SKIP), /* J_USB3_1 */
60 [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */
61 [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 */
62 [6] = USB2_PORT_MID(OC_SKIP), /* Camera */
63 [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
64 }"
65 register "usb3_ports" = "{
66 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB3_2 */
67 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH0 */
68 [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB3_1 */
69 [3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH1 */
70 }"
Tim Crawford94594602021-08-06 13:11:18 -060071 # ACPI
72 chip drivers/usb/acpi
73 device ref xhci_root_hub on
74 chip drivers/usb/acpi
75 register "desc" = ""USB2 J_USB3_2""
76 register "type" = "UPC_TYPE_A"
77 register "group" = "ACPI_PLD_GROUP(1, 2)"
78 device ref usb2_port1 on end
79 end
80 chip drivers/usb/acpi
81 register "desc" = ""USB2 J_TYPEC1""
82 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
83 register "group" = "ACPI_PLD_GROUP(2, 1)"
84 device ref usb2_port2 on end
85 end
86 chip drivers/usb/acpi
87 register "desc" = ""USB2 J_USB3_1""
88 register "type" = "UPC_TYPE_A"
89 register "group" = "ACPI_PLD_GROUP(2, 2)"
90 device ref usb2_port3 on end
91 end
92 chip drivers/usb/acpi
93 register "desc" = ""USB2 Fingerprint""
94 register "type" = "UPC_TYPE_INTERNAL"
95 device ref usb2_port5 on end
96 end
97 chip drivers/usb/acpi
98 register "desc" = ""USB2 J_TYPEC2""
99 register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
100 register "group" = "ACPI_PLD_GROUP(1, 1)"
101 device ref usb2_port6 on end
102 end
103 chip drivers/usb/acpi
104 register "desc" = ""USB2 Camera""
105 register "type" = "UPC_TYPE_INTERNAL"
106 device ref usb2_port7 on end
107 end
108 chip drivers/usb/acpi
109 register "desc" = ""USB2 Bluetooth""
110 register "type" = "UPC_TYPE_INTERNAL"
111 device ref usb2_port10 on end
112 end
113 chip drivers/usb/acpi
114 register "desc" = ""USB3 J_USB3_2""
115 register "type" = "UPC_TYPE_A"
116 register "group" = "ACPI_PLD_GROUP(1, 2)"
117 device ref usb3_port1 on end
118 end
119 chip drivers/usb/acpi
120 register "desc" = ""USB3 J_TYPEC1 CH0""
121 register "type" = "UPC_TYPE_A"
122 register "group" = "ACPI_PLD_GROUP(2, 1)"
123 device ref usb3_port2 on end
124 end
125 chip drivers/usb/acpi
126 register "desc" = ""USB3 J_USB3_1""
127 register "type" = "UPC_TYPE_A"
128 register "group" = "ACPI_PLD_GROUP(2, 2)"
129 device ref usb3_port3 on end
130 end
131 chip drivers/usb/acpi
132 register "desc" = ""USB3 J_TYPEC1 CH1""
133 register "type" = "UPC_TYPE_A"
134 register "group" = "ACPI_PLD_GROUP(2, 1)"
135 device ref usb3_port4 on end
136 end
137 end
138 end
139 end
Tim Crawford94594602021-08-06 13:11:18 -0600140 device ref i2c2 on
141 # TODO: Pantone ROM?
142 register "SerialIoI2cMode[PchSerialIoIndexI2C2]" = "PchSerialIoPci"
143 end
Tim Crawford94594602021-08-06 13:11:18 -0600144 device ref pcie_rp5 on
145 # PCIe root port #5 x4, Clock 2 (NVIDIA GPU)
Tim Crawford94594602021-08-06 13:11:18 -0600146 register "PcieRpLtrEnable[4]" = "1"
147 register "PcieClkSrcUsage[2]" = "4"
148 register "PcieClkSrcClkReq[2]" = "2"
149 chip soc/intel/common/block/pcie/rtd3
150 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_U5)" # DGPU_PWR_EN
151 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_U4)" # DGPU_RST#_PCH
152 register "enable_delay_ms" = "16"
153 register "enable_off_delay_ms" = "4"
154 register "reset_delay_ms" = "10"
155 register "reset_off_delay_ms" = "4"
156 register "srcclk_pin" = "2" # PEG_CLKREQ#
157 device generic 0 on end
158 end
159 end
160 device ref pcie_rp9 on
161 # PCIe root port #9 x1, Clock 3 (CARD)
Tim Crawford94594602021-08-06 13:11:18 -0600162 register "PcieRpLtrEnable[8]" = "1"
163 register "PcieClkSrcUsage[3]" = "8"
164 register "PcieClkSrcClkReq[3]" = "3"
165 end
166 device ref pcie_rp10 on
167 # PCIe root port #10 x1, Clock 4 (GLAN)
Tim Crawford94594602021-08-06 13:11:18 -0600168 register "PcieRpLtrEnable[9]" = "1"
169 register "PcieClkSrcUsage[4]" = "9"
170 register "PcieClkSrcClkReq[4]" = "4"
171 chip soc/intel/common/block/pcie/rtd3
172 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F9)" # GPIO_LAN_EN
173 register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F7)" # GPIO_LANRTD3
174 register "srcclk_pin" = "4" # LAN_CLKREQ#
175 device generic 0 on end
176 end
177 end
178 device ref pcie_rp11 on
179 # PCIe root port #11 x1, Clock 1 (WLAN)
Tim Crawford94594602021-08-06 13:11:18 -0600180 register "PcieRpLtrEnable[10]" = "1"
181 register "PcieClkSrcUsage[1]" = "10"
182 register "PcieClkSrcClkReq[1]" = "1"
Michael Niewöhner45b60802022-01-08 20:47:11 +0100183 register "PcieRpSlotImplemented[10]" = "1"
Tim Crawford94594602021-08-06 13:11:18 -0600184 end
Tim Crawford94594602021-08-06 13:11:18 -0600185 device ref pmc hidden
186 # The pmc_mux chip driver is a placeholder for the
187 # PMC.MUX device in the ACPI hierarchy.
188 chip drivers/intel/pmc_mux
189 device generic 0 on
190 chip drivers/intel/pmc_mux/conn
191 # J_TYPEC2
Reka Normand448f8c2021-12-09 12:09:27 +1100192 use usb2_port6 as usb2_port
193 use tcss_usb3_port1 as usb3_port
Tim Crawford94594602021-08-06 13:11:18 -0600194 # SBU & HSL follow CC
195 device generic 0 alias conn0 on end
196 end
197 end
198 end
199 end
Tim Crawford94594602021-08-06 13:11:18 -0600200 end
201end