Tim Crawford | 8093b77c | 2024-05-29 16:31:17 -0600 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 3 | chip soc/intel/tigerlake |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 4 | # Power limits |
| 5 | register "power_limits_config[POWER_LIMITS_U_4_CORE]" = "{ |
| 6 | .tdp_pl1_override = 28, |
| 7 | .tdp_pl2_override = 40, |
| 8 | }" |
| 9 | register "power_limits_config[POWER_LIMITS_U_2_CORE]" = "{ |
| 10 | .tdp_pl1_override = 28, |
| 11 | .tdp_pl2_override = 40, |
| 12 | }" |
| 13 | |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 14 | # GPE configuration |
| 15 | register "pmc_gpe0_dw0" = "PMC_GPP_A" |
| 16 | register "pmc_gpe0_dw1" = "PMC_GPP_R" |
| 17 | register "pmc_gpe0_dw2" = "PMC_GPD" |
| 18 | |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 19 | device domain 0 on |
| 20 | subsystemid 0x1558 0x51a1 inherit |
| 21 | |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 22 | device ref peg on |
| 23 | # PCIe PEG0 x4, Clock 0 (SSD1) |
| 24 | register "PcieClkSrcUsage[0]" = "0x40" |
| 25 | register "PcieClkSrcClkReq[0]" = "0" |
| 26 | chip soc/intel/common/block/pcie/rtd3 |
| 27 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B16)" # SSD1_PWR_EN |
| 28 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D13)" # GPP_D13_SSD1_PLT_RST# |
Tim Crawford | 2a404b5 | 2022-01-07 14:12:34 -0700 | [diff] [blame] | 29 | register "srcclk_pin" = "0" # SSD1_CLKREQ# |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 30 | device generic 0 on end |
| 31 | end |
| 32 | end |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 33 | device ref north_xhci on # J_TYPEC2 |
| 34 | register "UsbTcPortEn" = "1" |
| 35 | register "TcssXhciEn" = "1" |
| 36 | chip drivers/usb/acpi |
| 37 | device ref tcss_root_hub on |
| 38 | chip drivers/usb/acpi |
| 39 | register "desc" = ""USB3 J_TYPEC2"" |
| 40 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 41 | register "group" = "ACPI_PLD_GROUP(1, 3)" |
| 42 | device ref tcss_usb3_port1 on end |
| 43 | end |
| 44 | end |
| 45 | end |
| 46 | end |
| 47 | device ref tbt_dma0 on # J_TYPEC2 |
| 48 | chip drivers/intel/usb4/retimer |
| 49 | register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A23)" |
| 50 | use tcss_usb3_port1 as dfp[0].typec_port |
| 51 | device generic 0 on end |
| 52 | end |
| 53 | end |
| 54 | |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 55 | device ref south_xhci on |
Felix Singer | ee1fd54 | 2023-10-26 15:42:16 +0200 | [diff] [blame] | 56 | register "usb2_ports" = "{ |
| 57 | [0] = USB2_PORT_MID(OC_SKIP), /* UJ_USB1 */ |
| 58 | [1] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 */ |
| 59 | [2] = USB2_PORT_MID(OC_SKIP), /* J_USB3_1 */ |
| 60 | [4] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */ |
| 61 | [5] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC2 */ |
| 62 | [6] = USB2_PORT_MID(OC_SKIP), /* Camera */ |
| 63 | [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ |
| 64 | }" |
| 65 | register "usb3_ports" = "{ |
| 66 | [1] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH0 */ |
| 67 | [2] = USB3_PORT_DEFAULT(OC_SKIP), /* J_USB3_1 */ |
| 68 | [3] = USB3_PORT_DEFAULT(OC_SKIP), /* J_TYPEC1 CH1 */ |
| 69 | }" |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 70 | |
| 71 | # ACPI |
| 72 | chip drivers/usb/acpi |
| 73 | device ref xhci_root_hub on |
| 74 | chip drivers/usb/acpi |
| 75 | register "desc" = ""USB2 UJ_USB1"" |
| 76 | register "type" = "UPC_TYPE_A" |
| 77 | device ref usb2_port1 on end |
| 78 | end |
| 79 | chip drivers/usb/acpi |
| 80 | register "desc" = ""USB2 J_TYPEC1"" |
| 81 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 82 | register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 83 | device ref usb2_port2 on end |
| 84 | end |
| 85 | chip drivers/usb/acpi |
| 86 | register "desc" = ""USB2 J_USB3_1"" |
| 87 | register "type" = "UPC_TYPE_A" |
| 88 | register "group" = "ACPI_PLD_GROUP(1, 1)" |
| 89 | device ref usb2_port3 on end |
| 90 | end |
| 91 | chip drivers/usb/acpi |
| 92 | register "desc" = ""USB2 Fingerprint"" |
| 93 | register "type" = "UPC_TYPE_INTERNAL" |
| 94 | device ref usb2_port5 on end |
| 95 | end |
| 96 | chip drivers/usb/acpi |
| 97 | register "desc" = ""USB2 J_TYPEC2"" |
| 98 | register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" |
| 99 | register "group" = "ACPI_PLD_GROUP(1, 3)" |
| 100 | device ref usb2_port6 on end |
| 101 | end |
| 102 | chip drivers/usb/acpi |
| 103 | register "desc" = ""USB2 Camera"" |
| 104 | register "type" = "UPC_TYPE_INTERNAL" |
| 105 | device ref usb2_port7 on end |
| 106 | end |
| 107 | chip drivers/usb/acpi |
| 108 | register "desc" = ""USB2 Bluetooth"" |
| 109 | register "type" = "UPC_TYPE_INTERNAL" |
| 110 | device ref usb2_port10 on end |
| 111 | end |
| 112 | chip drivers/usb/acpi |
| 113 | register "desc" = ""USB3 J_TYPEC1 CH0"" |
| 114 | register "type" = "UPC_TYPE_A" |
| 115 | register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 116 | device ref usb3_port2 on end |
| 117 | end |
| 118 | chip drivers/usb/acpi |
| 119 | register "desc" = ""USB3 J_USB3_1"" |
| 120 | register "type" = "UPC_TYPE_A" |
| 121 | register "group" = "ACPI_PLD_GROUP(1, 1)" |
| 122 | device ref usb3_port3 on end |
| 123 | end |
| 124 | chip drivers/usb/acpi |
| 125 | register "desc" = ""USB3 J_TYPEC1 CH1"" |
| 126 | register "type" = "UPC_TYPE_A" |
| 127 | # TODO |
| 128 | #register "group" = "ACPI_PLD_GROUP(1, 2)" |
| 129 | device ref usb3_port4 on end |
| 130 | end |
| 131 | end |
| 132 | end |
| 133 | end |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 134 | device ref sata on |
| 135 | # SATA1 (SSD0) |
| 136 | register "SataPortsEnable[1]" = "1" |
| 137 | register "SataPortsDevSlp[1]" = "1" |
| 138 | register "SataPortsEnableDitoConfig[1]" = "1" |
| 139 | register "SataSalpSupport" = "1" |
| 140 | end |
| 141 | device ref pcie_rp1 on |
| 142 | register "PcieRpLtrEnable[0]" = "1" |
| 143 | end |
| 144 | device ref pcie_rp6 on |
| 145 | # PCIe root port #6 x1, Clock 2 (CARD) |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 146 | register "PcieRpLtrEnable[5]" = "1" |
| 147 | register "PcieClkSrcUsage[2]" = "5" |
| 148 | register "PcieClkSrcClkReq[2]" = "2" |
| 149 | end |
| 150 | device ref pcie_rp7 on |
| 151 | # PCIe root port #7 x1, Clock 3 (GLAN) |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 152 | register "PcieRpLtrEnable[6]" = "1" |
| 153 | register "PcieClkSrcUsage[3]" = "6" |
| 154 | register "PcieClkSrcClkReq[3]" = "3" |
| 155 | chip soc/intel/common/block/pcie/rtd3 |
| 156 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_F9)" # GPIO_LAN_EN |
| 157 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F7)" # GPIO_LANRTD3 |
| 158 | register "srcclk_pin" = "3" # GLAN_CLKREQ# |
| 159 | device generic 0 on end |
| 160 | end |
| 161 | end |
| 162 | device ref pcie_rp8 on |
| 163 | # PCIe root port #8 x1, Clock 1 (WLAN) |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 164 | register "PcieRpLtrEnable[7]" = "1" |
| 165 | register "PcieClkSrcUsage[1]" = "7" |
| 166 | register "PcieClkSrcClkReq[1]" = "1" |
Michael Niewöhner | 45b6080 | 2022-01-08 20:47:11 +0100 | [diff] [blame] | 167 | register "PcieRpSlotImplemented[7]" = "1" |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 168 | end |
| 169 | device ref pcie_rp9 on |
| 170 | # PCIe root port #9 x4, Clock 4 (SSD0) |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 171 | register "PcieRpLtrEnable[8]" = "1" |
| 172 | register "PcieClkSrcUsage[4]" = "8" |
| 173 | register "PcieClkSrcClkReq[4]" = "4" |
Michael Niewöhner | 45b6080 | 2022-01-08 20:47:11 +0100 | [diff] [blame] | 174 | register "PcieRpSlotImplemented[8]" = "1" |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 175 | chip soc/intel/common/block/pcie/rtd3 |
| 176 | register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D14)" # SSD_PWR_EN |
| 177 | register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)" # GPP_H0_RTD3 |
| 178 | register "srcclk_pin" = "4" |
| 179 | device generic 0 on end |
| 180 | end |
| 181 | end |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 182 | device ref pmc hidden |
| 183 | # The pmc_mux chip driver is a placeholder for the |
| 184 | # PMC.MUX device in the ACPI hierarchy. |
| 185 | chip drivers/intel/pmc_mux |
| 186 | device generic 0 on |
| 187 | chip drivers/intel/pmc_mux/conn |
| 188 | # J_TYPEC2 |
Reka Norman | d448f8c | 2021-12-09 12:09:27 +1100 | [diff] [blame] | 189 | use usb2_port6 as usb2_port |
| 190 | use tcss_usb3_port1 as usb3_port |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 191 | # SBU & HSL follow CC |
| 192 | device generic 0 alias conn0 on end |
| 193 | end |
| 194 | end |
| 195 | end |
| 196 | end |
Tim Crawford | 42e61fb | 2021-08-06 10:41:44 -0600 | [diff] [blame] | 197 | end |
| 198 | end |