Tim Crawford | 8093b77c | 2024-05-29 16:31:17 -0600 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
Jeremy Soller | 4814492 | 2023-05-16 14:56:43 -0600 | [diff] [blame] | 3 | chip soc/intel/alderlake |
| 4 | register "power_limits_config[RPL_P_282_242_142_15W_CORE]" = "{ |
| 5 | .tdp_pl1_override = 15, |
| 6 | .tdp_pl2_override = 46, |
| 7 | }" |
| 8 | |
| 9 | device domain 0 on |
| 10 | subsystemid 0x1558 0x7724 inherit |
| 11 | |
| 12 | device ref tbt_pcie_rp0 on end |
| 13 | device ref tcss_xhci on |
| 14 | register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" |
| 15 | end |
| 16 | device ref tcss_dma0 on end |
| 17 | device ref xhci on |
Felix Singer | 983b169 | 2023-10-26 16:14:34 +0200 | [diff] [blame] | 18 | register "usb2_ports" = "{ |
| 19 | [0] = USB2_PORT_MID(OC_SKIP), /* Type-A Left */ |
| 20 | [1] = USB2_PORT_MID(OC_SKIP), /* Type-A Right */ |
| 21 | [2] = USB2_PORT_TYPE_C(OC_SKIP), /* J_TYPEC1 */ |
| 22 | [3] = USB2_PORT_MID(OC_SKIP), /* 3G/LTE */ |
| 23 | [6] = USB2_PORT_MID(OC_SKIP), /* Camera */ |
| 24 | [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ |
| 25 | }" |
| 26 | register "usb3_ports" = "{ |
| 27 | [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Left */ |
| 28 | [1] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A Right */ |
| 29 | [3] = USB3_PORT_DEFAULT(OC_SKIP), /* 3G/LTE */ |
| 30 | }" |
Jeremy Soller | 4814492 | 2023-05-16 14:56:43 -0600 | [diff] [blame] | 31 | end |
| 32 | |
| 33 | device ref i2c0 on |
| 34 | # Touchpad I2C bus |
| 35 | register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci" |
| 36 | chip drivers/i2c/hid |
| 37 | register "generic.hid" = ""ELAN0412"" |
| 38 | register "generic.desc" = ""ELAN Touchpad"" |
| 39 | register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E12)" |
| 40 | register "generic.detect" = "1" |
| 41 | register "hid_desc_reg_offset" = "0x01" |
| 42 | device i2c 15 on end |
| 43 | end |
| 44 | chip drivers/i2c/hid |
| 45 | register "generic.hid" = ""FTCS1000"" |
| 46 | register "generic.desc" = ""FocalTech Touchpad"" |
| 47 | register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_E12)" |
| 48 | register "generic.detect" = "1" |
| 49 | register "hid_desc_reg_offset" = "0x01" |
| 50 | device i2c 38 on end |
| 51 | end |
| 52 | end |
| 53 | |
| 54 | device ref pcie4_0 on |
| 55 | # CPU RP#1 x4, Clock 0 (SSD2) |
| 56 | register "cpu_pcie_rp[CPU_RP(1)]" = "{ |
| 57 | .clk_src = 0, |
| 58 | .clk_req = 0, |
| 59 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 60 | }" |
| 61 | end |
| 62 | device ref pcie_rp5 on |
| 63 | # PCH RP#5 x1, Clock 2 (WLAN) |
| 64 | register "pch_pcie_rp[PCH_RP(5)]" = "{ |
| 65 | .clk_src = 2, |
| 66 | .clk_req = 2, |
| 67 | .flags = PCIE_RP_LTR | PCIE_RP_AER, |
| 68 | }" |
| 69 | end |
| 70 | device ref pcie_rp6 on |
| 71 | # PCH RP#6 x1, Clock 6 (CARD) |
| 72 | register "pch_pcie_rp[PCH_RP(6)]" = "{ |
| 73 | .clk_src = 6, |
| 74 | .clk_req = 6, |
| 75 | .flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER, |
| 76 | }" |
| 77 | end |
| 78 | device ref pcie_rp9 on |
| 79 | # PCH RP#9 x4, Clock 1 (SSD1) |
| 80 | register "pch_pcie_rp[PCH_RP(9)]" = "{ |
| 81 | .clk_src = 1, |
| 82 | .clk_req = 1, |
| 83 | .flags = PCIE_RP_LTR, |
Tim Crawford | b1ed9f4 | 2024-02-29 11:34:05 -0700 | [diff] [blame] | 84 | .pcie_rp_detect_timeout_ms = 50, |
Jeremy Soller | 4814492 | 2023-05-16 14:56:43 -0600 | [diff] [blame] | 85 | }" |
| 86 | end |
| 87 | end |
| 88 | end |