blob: 9c747cf180539826e284638c1baefd4e6bfa33aa [file] [log] [blame]
Tim Crawford8093b77c2024-05-29 16:31:17 -06001# SPDX-License-Identifier: GPL-2.0-only
2
Tim Crawfordf8ba8982021-04-01 15:49:33 -06003chip soc/intel/cannonlake
4 device domain 0 on
5 subsystemid 0x1558 0x1403 inherit
Tim Crawford5b7b04c2022-11-28 12:54:24 -07006
7 device pci 14.0 on # USB xHCI
Felix Singerd1632532023-10-26 15:02:46 +02008 register "usb2_ports" = "{
9 [0] = USB2_PORT_MID(OC_SKIP), /* Type-A port 1 */
10 [1] = USB2_PORT_MID(OC_SKIP), /* 3G / LTE */
11 [2] = USB2_PORT_TYPE_C(OC_SKIP), /* Type-C port 3 */
12 [3] = USB2_PORT_MID(OC_SKIP), /* USB Board port 4 */
13 [6] = USB2_PORT_MAX(OC_SKIP), /* Camera */
14 [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */
15 }"
16 register "usb3_ports" = "{
17 [0] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-A port 1 */
18 [1] = USB3_PORT_DEFAULT(OC_SKIP), /* 4G */
19 [2] = USB3_PORT_DEFAULT(OC_SKIP), /* Type-C port 3 */
20 [3] = USB3_PORT_DEFAULT(OC_SKIP), /* USB Board port 4 */
21 [4] = USB3_PORT_EMPTY, /* Used by TBT */
22 [5] = USB3_PORT_EMPTY, /* Used by TBT */
23 }"
Tim Crawford5b7b04c2022-11-28 12:54:24 -070024 end
25 device pci 15.0 on # I2C #0
Tim Crawfordf8ba8982021-04-01 15:49:33 -060026 # I2C HID not supported on galp4
Tim Crawford5b7b04c2022-11-28 12:54:24 -070027 end
28 device pci 17.0 on # SATA
Felix Singerd1632532023-10-26 15:02:46 +020029 register "SataPortsEnable" = "{
30 [0] = 1,
31 [2] = 1,
32 }"
Tim Crawford5b7b04c2022-11-28 12:54:24 -070033 end
34 device pci 1c.4 on # PCI Express Port 5
35 # PCI Express Root port #5 x4, Clock 4 (TBT)
36 register "PcieRpEnable[4]" = "1"
37 register "PcieRpLtrEnable[4]" = "1"
38 register "PcieRpHotPlug[4]" = "1"
39 register "PcieClkSrcUsage[4]" = "4"
40 register "PcieClkSrcClkReq[4]" = "4"
41 end
42 device pci 1d.0 on # PCI Express Port 9
43 # PCI Express Root port #9 x1, Clock 3 (LAN)
44 register "PcieRpEnable[8]" = "1"
45 register "PcieRpLtrEnable[8]" = "1"
46 register "PcieClkSrcUsage[3]" = "8"
47 register "PcieClkSrcClkReq[3]" = "3"
48 end
49 device pci 1d.1 on # PCI Express Port 10
50 # PCI Express Root port #10 x1, Clock 2 (WLAN)
51 register "PcieRpEnable[9]" = "1"
52 register "PcieRpLtrEnable[9]" = "0"
53 register "PcieClkSrcUsage[2]" = "9"
54 register "PcieClkSrcClkReq[2]" = "2"
55 end
56 device pci 1d.4 on # PCI Express Port 13
57 # PCI Express Root port #13 x4, Clock 5 (NVMe)
58 register "PcieRpEnable[12]" = "1"
59 register "PcieRpLtrEnable[12]" = "1"
60 register "PcieClkSrcUsage[5]" = "12"
61 register "PcieClkSrcClkReq[5]" = "5"
62 end
63 device pci 1f.3 on # Intel HDA
64 register "PchHdaAudioLinkDmic0" = "1"
65 register "PchHdaAudioLinkDmic1" = "1"
66 end
Tim Crawfordf8ba8982021-04-01 15:49:33 -060067 end
68end