Tim Crawford | 8093b77c | 2024-05-29 16:31:17 -0600 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 3 | chip soc/intel/cannonlake |
| 4 | register "common_soc_config" = "{ |
| 5 | /* Touchpad */ |
| 6 | .i2c[0] = { |
| 7 | .speed = I2C_SPEED_FAST, |
| 8 | .rise_time_ns = 80, |
| 9 | .fall_time_ns = 110, |
| 10 | }, |
| 11 | }" |
| 12 | |
| 13 | # CPU (soc/intel/cannonlake/cpu.c) |
| 14 | # Power limit |
| 15 | register "power_limits_config" = "{ |
| 16 | .tdp_pl1_override = 20, |
| 17 | .tdp_pl2_override = 30, |
| 18 | }" |
| 19 | |
| 20 | # Enable Enhanced Intel SpeedStep |
| 21 | register "eist_enable" = "1" |
| 22 | |
| 23 | # FSP Memory (soc/intel/cannonlake/romstage/fsp_params.c) |
| 24 | register "SaGv" = "SaGv_Enabled" |
| 25 | register "enable_c6dram" = "1" |
| 26 | |
| 27 | # FSP Silicon (soc/intel/cannonlake/fsp_params.c) |
| 28 | # Serial I/O |
| 29 | register "SerialIoDevMode" = "{ |
| 30 | [PchSerialIoIndexI2C0] = PchSerialIoPci, // Touchpad |
| 31 | [PchSerialIoIndexUART2] = PchSerialIoSkipInit, // LPSS UART |
| 32 | }" |
| 33 | |
| 34 | # Misc |
| 35 | register "AcousticNoiseMitigation" = "1" |
| 36 | |
| 37 | # Power |
| 38 | register "PchPmSlpS3MinAssert" = "3" # 50ms |
| 39 | register "PchPmSlpS4MinAssert" = "1" # 1s |
| 40 | register "PchPmSlpSusMinAssert" = "2" # 500ms |
| 41 | register "PchPmSlpAMinAssert" = "4" # 2s |
| 42 | |
| 43 | # Thermal |
| 44 | register "tcc_offset" = "12" |
| 45 | |
| 46 | # Serial IRQ Continuous |
| 47 | register "serirq_mode" = "SERIRQ_CONTINUOUS" |
| 48 | |
| 49 | # PM Util (soc/intel/cannonlake/pmutil.c) |
| 50 | # GPE configuration |
| 51 | # Note that GPE events called out in ASL code rely on this |
| 52 | # route. i.e. If this route changes then the affected GPE |
| 53 | # offset bits also need to be changed. |
| 54 | register "gpe0_dw0" = "PMC_GPP_C" |
| 55 | register "gpe0_dw1" = "PMC_GPP_D" |
| 56 | register "gpe0_dw2" = "PMC_GPP_E" |
| 57 | |
| 58 | # Actual device tree |
Arthur Heymans | 69cd729 | 2022-11-07 13:52:11 +0100 | [diff] [blame] | 59 | device cpu_cluster 0 on end |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 60 | |
| 61 | device domain 0 on |
| 62 | device pci 00.0 on end # Host Bridge |
| 63 | device pci 02.0 on # Integrated Graphics Device |
| 64 | register "gfx" = "GMA_DEFAULT_PANEL(0)" |
| 65 | end |
| 66 | device pci 04.0 on # SA Thermal device |
| 67 | register "Device4Enable" = "1" |
| 68 | end |
| 69 | device pci 12.0 on end # Thermal Subsystem |
| 70 | device pci 12.5 off end # UFS SCS |
| 71 | device pci 12.6 off end # GSPI #2 |
| 72 | device pci 13.0 off end # Integrated Sensor Hub |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 73 | device pci 14.1 off end # USB xDCI (OTG) |
| 74 | device pci 14.3 on # CNVi wifi |
| 75 | chip drivers/wifi/generic |
Tim Crawford | 5b7b04c | 2022-11-28 12:54:24 -0700 | [diff] [blame] | 76 | register "wake" = "GPE0_PME_B0" |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 77 | device generic 0 on end |
| 78 | end |
| 79 | end |
| 80 | device pci 14.5 off end # SDCard |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 81 | device pci 15.1 off end # I2C #1 |
| 82 | device pci 15.2 off end # I2C #2 |
| 83 | device pci 15.3 off end # I2C #3 |
Tim Crawford | c3ced8f | 2021-10-27 15:14:54 -0600 | [diff] [blame] | 84 | device pci 16.0 on end # Management Engine Interface 1 |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 85 | device pci 16.1 off end # Management Engine Interface 2 |
| 86 | device pci 16.2 off end # Management Engine IDE-R |
| 87 | device pci 16.3 off end # Management Engine KT Redirection |
| 88 | device pci 16.4 off end # Management Engine Interface 3 |
| 89 | device pci 16.5 off end # Management Engine Interface 4 |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 90 | device pci 19.0 off end # I2C #4 |
| 91 | device pci 19.1 off end # I2C #5 |
| 92 | device pci 19.2 on end # UART #2 |
| 93 | device pci 1a.0 off end # eMMC |
Tim Crawford | 5b7b04c | 2022-11-28 12:54:24 -0700 | [diff] [blame] | 94 | device pci 1c.0 off end # PCI Express Port 1 |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 95 | device pci 1c.1 off end # PCI Express Port 2 |
| 96 | device pci 1c.2 off end # PCI Express Port 3 |
| 97 | device pci 1c.3 off end # PCI Express Port 4 |
Tim Crawford | 5b7b04c | 2022-11-28 12:54:24 -0700 | [diff] [blame] | 98 | device pci 1c.4 off end # PCI Express Port 5 |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 99 | device pci 1c.5 off end # PCI Express Port 6 |
| 100 | device pci 1c.6 off end # PCI Express Port 7 |
| 101 | device pci 1c.7 off end # PCI Express Port 8 |
Tim Crawford | 5b7b04c | 2022-11-28 12:54:24 -0700 | [diff] [blame] | 102 | device pci 1d.0 off end # PCI Express Port 9 |
| 103 | device pci 1d.1 off end # PCI Express Port 10 |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 104 | device pci 1d.2 off end # PCI Express Port 11 |
| 105 | device pci 1d.3 off end # PCI Express Port 12 |
Tim Crawford | 5b7b04c | 2022-11-28 12:54:24 -0700 | [diff] [blame] | 106 | device pci 1d.4 off end # PCI Express Port 13 |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 107 | device pci 1d.5 off end # PCI Express Port 14 |
| 108 | device pci 1d.6 off end # PCI Express Port 15 |
| 109 | device pci 1d.7 off end # PCI Express Port 16 |
| 110 | device pci 1e.0 off end # UART #0 |
| 111 | device pci 1e.1 off end # UART #1 |
| 112 | device pci 1e.2 off end # GSPI #0 |
| 113 | device pci 1e.3 off end # GSPI #1 |
| 114 | device pci 1f.0 on # LPC Interface |
| 115 | register "gen1_dec" = "0x00040069" |
| 116 | register "gen2_dec" = "0x00fc0e01" |
| 117 | register "gen3_dec" = "0x00fc0f01" |
| 118 | chip drivers/pc80/tpm |
| 119 | device pnp 0c31.0 on end |
| 120 | end |
| 121 | end |
| 122 | device pci 1f.1 off end # P2SB |
| 123 | device pci 1f.2 hidden end # Power Management Controller |
| 124 | device pci 1f.3 on # Intel HDA |
| 125 | register "PchHdaAudioLinkHda" = "1" |
Tim Crawford | f8ba898 | 2021-04-01 15:49:33 -0600 | [diff] [blame] | 126 | end |
| 127 | device pci 1f.4 on end # SMBus |
| 128 | device pci 1f.5 on end # PCH SPI |
| 129 | device pci 1f.6 off end # GbE |
| 130 | end |
| 131 | end |