Tim Crawford | 8093b77c | 2024-05-29 16:31:17 -0600 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | |
Jeremy Soller | 976e09b | 2023-03-24 08:48:37 -0600 | [diff] [blame] | 3 | chip soc/intel/alderlake |
| 4 | # FIVR configuration |
| 5 | # Read EXT_RAIL_CONFIG to determine bitmaps |
| 6 | # sudo devmem2 0xfe0011b8 |
| 7 | # 0x0 |
| 8 | # Read EXT_V1P05_VR_CONFIG |
| 9 | # sudo devmem2 0xfe0011c0 |
| 10 | # 0x1a42000 |
| 11 | # Read EXT_VNN_VR_CONFIG0 |
| 12 | # sudo devmem2 0xfe0011c4 |
| 13 | # 0x1a42000 |
| 14 | # TODO: v1p05 voltage and vnn icc max? |
| 15 | register "ext_fivr_settings" = "{ |
| 16 | .configure_ext_fivr = 1, |
| 17 | .v1p05_enable_bitmap = 0, |
| 18 | .vnn_enable_bitmap = 0, |
| 19 | .v1p05_supported_voltage_bitmap = 0, |
| 20 | .vnn_supported_voltage_bitmap = 0, |
| 21 | .v1p05_icc_max_ma = 500, |
| 22 | .vnn_sx_voltage_mv = 1050, |
| 23 | }" |
| 24 | |
| 25 | # Thermal |
| 26 | register "tcc_offset" = "10" |
| 27 | |
| 28 | # GPE configuration |
| 29 | register "pmc_gpe0_dw0" = "PMC_GPP_R" |
| 30 | register "pmc_gpe0_dw1" = "PMC_GPP_B" |
| 31 | register "pmc_gpe0_dw2" = "PMC_GPP_D" |
| 32 | |
| 33 | device domain 0 on |
| 34 | subsystemid 0x1558 0x867c inherit |
| 35 | |
| 36 | device ref pcie5_0 on |
| 37 | # PCIe PEG2 x8, Clock 3 (DGPU) |
| 38 | register "cpu_pcie_rp[CPU_RP(2)]" = "{ |
| 39 | .clk_src = 3, |
| 40 | .clk_req = 3, |
| 41 | .flags = PCIE_RP_LTR, |
| 42 | }" |
| 43 | end |
| 44 | device ref igpu on |
| 45 | # DDIA is eDP |
| 46 | register "ddi_portA_config" = "1" |
| 47 | register "ddi_ports_config[DDI_PORT_A]" = "DDI_ENABLE_HPD" |
| 48 | |
| 49 | register "gfx" = "GMA_DEFAULT_PANEL(0)" |
| 50 | end |
| 51 | device ref pcie4_0 on |
| 52 | # PCIe PEG0 x4, Clock 0 (SSD2) |
| 53 | register "cpu_pcie_rp[CPU_RP(1)]" = "{ |
| 54 | .clk_src = 0, |
| 55 | .clk_req = 0, |
| 56 | .flags = PCIE_RP_LTR, |
| 57 | }" |
| 58 | end |
| 59 | device ref i2c0 on |
| 60 | # Touchpad I2C bus |
| 61 | register "serial_io_i2c_mode[PchSerialIoIndexI2C0]" = "PchSerialIoPci" |
| 62 | chip drivers/i2c/hid |
| 63 | register "generic.hid" = ""ELAN0412"" |
| 64 | register "generic.desc" = ""ELAN Touchpad"" |
| 65 | register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A17)" |
| 66 | register "generic.detect" = "1" |
| 67 | register "hid_desc_reg_offset" = "0x01" |
| 68 | device i2c 15 on end |
| 69 | end |
| 70 | chip drivers/i2c/hid |
| 71 | register "generic.hid" = ""FTCS1000"" |
| 72 | register "generic.desc" = ""FocalTech Touchpad"" |
| 73 | register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPP_A17)" |
| 74 | register "generic.detect" = "1" |
| 75 | register "hid_desc_reg_offset" = "0x01" |
| 76 | device i2c 38 on end |
| 77 | end |
| 78 | end |
| 79 | device ref i2c1 off end |
| 80 | device ref tcss_xhci on |
| 81 | register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)" |
| 82 | device ref tcss_root_hub on |
| 83 | device ref tcss_usb3_port1 on end |
| 84 | end |
| 85 | end |
| 86 | device ref tcss_dma0 on end |
| 87 | device ref xhci on |
Felix Singer | 1b102ca | 2023-10-26 16:32:19 +0200 | [diff] [blame] | 88 | register "usb2_ports" = "{ |
| 89 | [0] = USB2_PORT_MID(OC_SKIP), /* USB 3.2 Type-A audio board */ |
| 90 | [2] = USB2_PORT_TYPE_C(OC_SKIP), /* USB 3.2 Type-C */ |
| 91 | [5] = USB2_PORT_MID(OC_SKIP), /* USB 2.0 Type-A audio board */ |
| 92 | [6] = USB2_PORT_MID(OC_SKIP), /* Fingerprint */ |
| 93 | [7] = USB2_PORT_MID(OC_SKIP), /* Camera */ |
| 94 | [8] = USB2_PORT_TYPE_C(OC_SKIP), /* Thunderbolt Type-C */ |
| 95 | [9] = USB2_PORT_MID(OC_SKIP), /* Bluetooth */ |
| 96 | }" |
| 97 | register "usb3_ports" = "{ |
| 98 | [0] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.2 Type-A audio board */ |
| 99 | [2] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.2 Type-C side A */ |
| 100 | [3] = USB3_PORT_DEFAULT(OC_SKIP), /* USB 3.2 Type-C side B */ |
| 101 | }" |
Jeremy Soller | 976e09b | 2023-03-24 08:48:37 -0600 | [diff] [blame] | 102 | end |
| 103 | device ref pcie_rp5 on |
| 104 | # PCIe root port #5 x1, Clock 2 (WLAN) |
| 105 | register "pch_pcie_rp[PCH_RP(5)]" = "{ |
| 106 | .clk_src = 2, |
| 107 | .clk_req = 2, |
| 108 | .flags = PCIE_RP_LTR, |
| 109 | }" |
Jeremy Soller | 976e09b | 2023-03-24 08:48:37 -0600 | [diff] [blame] | 110 | end |
| 111 | device ref pcie_rp6 on |
| 112 | # PCIe root port #6 x1, Clock 5 (CARD) |
| 113 | register "pch_pcie_rp[PCH_RP(6)]" = "{ |
| 114 | .clk_src = 5, |
| 115 | .clk_req = 5, |
| 116 | .flags = PCIE_RP_LTR, |
| 117 | }" |
Jeremy Soller | 976e09b | 2023-03-24 08:48:37 -0600 | [diff] [blame] | 118 | end |
| 119 | device ref pcie_rp7 on |
| 120 | # PCIe root port #7 x1, Clock 6 (GLAN) |
| 121 | # Clock source is shared with LAN and hence marked as free running. |
| 122 | register "pch_pcie_rp[PCH_RP(7)]" = "{ |
| 123 | .clk_src = 6, |
| 124 | .clk_req = 6, |
| 125 | .flags = PCIE_RP_LTR | PCIE_RP_CLK_SRC_UNUSED, |
| 126 | }" |
| 127 | register "pcie_clk_config_flag[6]" = "PCIE_CLK_FREE_RUNNING" |
| 128 | end |
| 129 | device ref pcie_rp9 on |
| 130 | # PCIe root port #9 x4, Clock 1 (SSD1) |
| 131 | register "pch_pcie_rp[PCH_RP(9)]" = "{ |
| 132 | .clk_src = 1, |
| 133 | .clk_req = 1, |
| 134 | .flags = PCIE_RP_LTR, |
Tim Crawford | b1ed9f4 | 2024-02-29 11:34:05 -0700 | [diff] [blame] | 135 | .pcie_rp_detect_timeout_ms = 50, |
Jeremy Soller | 976e09b | 2023-03-24 08:48:37 -0600 | [diff] [blame] | 136 | }" |
Jeremy Soller | 976e09b | 2023-03-24 08:48:37 -0600 | [diff] [blame] | 137 | end |
| 138 | device ref gbe on end |
| 139 | end |
| 140 | end |