Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Google Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 14 | */ |
| 15 | |
| 16 | Scope (\_SB.PCI0.MCHC) |
| 17 | { |
| 18 | Mutex (CTCM, 1) /* CTDP Switch Mutex (sync level 1) */ |
| 19 | Name (CTCC, 0) /* CTDP Current Selection */ |
| 20 | Name (CTCN, 0) /* CTDP Nominal Select */ |
| 21 | Name (CTCD, 1) /* CTDP Down Select */ |
| 22 | Name (CTCU, 2) /* CTDP Up Select */ |
| 23 | Name (SPL1, 0) /* Saved PL1 value */ |
| 24 | |
| 25 | OperationRegion (MCHB, SystemMemory, |
| 26 | Add (MCH_BASE_ADDRESS, 0x5000), 0x1000) |
| 27 | Field (MCHB, DWordAcc, Lock, Preserve) |
| 28 | { |
| 29 | Offset (0x930), /* PACKAGE_POWER_SKU */ |
| 30 | CTDN, 15, /* CTDP Nominal PL1 */ |
| 31 | Offset (0x938), /* PACKAGE_POWER_SKU_UNIT */ |
| 32 | PUNI, 4, /* Power Units */ |
| 33 | , 4, |
| 34 | EUNI, 5, /* Energy Units */ |
| 35 | , 3, |
| 36 | TUNI, 4, /* Time Units */ |
| 37 | Offset (0x958), /* PLATFORM_INFO */ |
| 38 | , 40, |
| 39 | LFM_, 8, /* Maximum Efficiency Ratio (LFM) */ |
| 40 | Offset (0x9a0), /* TURBO_POWER_LIMIT1 */ |
| 41 | PL1V, 15, /* Power Limit 1 Value */ |
| 42 | PL1E, 1, /* Power Limit 1 Enable */ |
| 43 | PL1C, 1, /* Power Limit 1 Clamp */ |
| 44 | PL1T, 7, /* Power Limit 1 Time */ |
| 45 | Offset (0x9a4), /* TURBO_POWER_LIMIT2 */ |
| 46 | PL2V, 15, /* Power Limit 2 Value */ |
| 47 | PL2E, 1, /* Power Limit 2 Enable */ |
| 48 | PL2C, 1, /* Power Limit 2 Clamp */ |
| 49 | PL2T, 7, /* Power Limit 2 Time */ |
| 50 | Offset (0xf3c), /* CONFIG_TDP_NOMINAL */ |
| 51 | TARN, 8, /* CTDP Nominal Turbo Activation Ratio */ |
| 52 | Offset (0xf40), /* CONFIG_TDP_LEVEL1 */ |
| 53 | CTDD, 15, /* CTDP Down PL1 */ |
| 54 | , 1, |
| 55 | TARD, 8, /* CTDP Down Turbo Activation Ratio */ |
| 56 | Offset (0xf48), /* MSR_CONFIG_TDP_LEVEL2 */ |
| 57 | CTDU, 15, /* CTDP Up PL1 */ |
| 58 | , 1, |
| 59 | TARU, 8, /* CTDP Up Turbo Activation Ratio */ |
| 60 | Offset (0xf50), /* CONFIG_TDP_CONTROL */ |
| 61 | CTCS, 2, /* CTDP Select */ |
| 62 | Offset (0xf54), /* TURBO_ACTIVATION_RATIO */ |
| 63 | TARS, 8, /* Turbo Activation Ratio Select */ |
| 64 | } |
| 65 | |
| 66 | /* |
| 67 | * Search CPU0 _PSS looking for control=arg0 and then |
| 68 | * return previous P-state entry number for new _PPC |
| 69 | * |
| 70 | * Format of _PSS: |
| 71 | * Name (_PSS, Package () { |
| 72 | * Package (6) { freq, power, tlat, blat, control, status } |
| 73 | * } |
| 74 | */ |
Timothy Pearson | 033bb4b | 2015-02-10 22:21:39 -0600 | [diff] [blame] | 75 | External (\_PR.CP00._PSS) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 76 | Method (PSSS, 1, NotSerialized) |
| 77 | { |
| 78 | Store (One, Local0) /* Start at P1 */ |
Timothy Pearson | 033bb4b | 2015-02-10 22:21:39 -0600 | [diff] [blame] | 79 | Store (SizeOf (\_PR.CP00._PSS), Local1) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 80 | |
| 81 | While (LLess (Local0, Local1)) { |
| 82 | /* Store _PSS entry Control value to Local2 */ |
| 83 | ShiftRight (DeRefOf (Index (DeRefOf (Index |
Timothy Pearson | 033bb4b | 2015-02-10 22:21:39 -0600 | [diff] [blame] | 84 | (\_PR.CP00._PSS, Local0)), 4)), 8, Local2) |
Duncan Laurie | c88c54c | 2014-04-30 16:36:13 -0700 | [diff] [blame] | 85 | If (LEqual (Local2, Arg0)) { |
| 86 | Return (Subtract (Local0, 1)) |
| 87 | } |
| 88 | Increment (Local0) |
| 89 | } |
| 90 | |
| 91 | Return (0) |
| 92 | } |
| 93 | |
| 94 | /* Calculate PL2 based on chip type */ |
| 95 | Method (CPL2, 1, NotSerialized) |
| 96 | { |
| 97 | /* Haswell ULT PL2 = 25W */ |
| 98 | /* FIXME: update for broadwell */ |
| 99 | Return (Multiply (25, 8)) |
| 100 | } |
| 101 | |
| 102 | /* Set Config TDP Down */ |
| 103 | Method (STND, 0, Serialized) |
| 104 | { |
| 105 | If (Acquire (CTCM, 100)) { |
| 106 | Return (0) |
| 107 | } |
| 108 | If (LEqual (CTCD, CTCC)) { |
| 109 | Release (CTCM) |
| 110 | Return (0) |
| 111 | } |
| 112 | |
| 113 | Store ("Set TDP Down", Debug) |
| 114 | |
| 115 | /* Set CTC */ |
| 116 | Store (CTCD, CTCS) |
| 117 | |
| 118 | /* Set TAR */ |
| 119 | Store (TARD, TARS) |
| 120 | |
| 121 | /* Set PPC limit and notify OS */ |
| 122 | Store (PSSS (TARD), PPCM) |
| 123 | PPCN () |
| 124 | |
| 125 | /* Set PL2 */ |
| 126 | Store (CPL2 (CTDD), PL2V) |
| 127 | |
| 128 | /* Set PL1 */ |
| 129 | Store (CTDD, PL1V) |
| 130 | |
| 131 | /* Store the new TDP Down setting */ |
| 132 | Store (CTCD, CTCC) |
| 133 | |
| 134 | Release (CTCM) |
| 135 | Return (1) |
| 136 | } |
| 137 | |
| 138 | /* Set Config TDP Nominal from Down */ |
| 139 | Method (STDN, 0, Serialized) |
| 140 | { |
| 141 | If (Acquire (CTCM, 100)) { |
| 142 | Return (0) |
| 143 | } |
| 144 | If (LEqual (CTCN, CTCC)) { |
| 145 | Release (CTCM) |
| 146 | Return (0) |
| 147 | } |
| 148 | |
| 149 | Store ("Set TDP Nominal", Debug) |
| 150 | |
| 151 | /* Set PL1 */ |
| 152 | Store (CTDN, PL1V) |
| 153 | |
| 154 | /* Set PL2 */ |
| 155 | Store (CPL2 (CTDN), PL2V) |
| 156 | |
| 157 | /* Set PPC limit and notify OS */ |
| 158 | Store (PSSS (TARN), PPCM) |
| 159 | PPCN () |
| 160 | |
| 161 | /* Set TAR */ |
| 162 | Store (TARN, TARS) |
| 163 | |
| 164 | /* Set CTC */ |
| 165 | Store (CTCN, CTCS) |
| 166 | |
| 167 | /* Store the new TDP Nominal setting */ |
| 168 | Store (CTCN, CTCC) |
| 169 | |
| 170 | Release (CTCM) |
| 171 | Return (1) |
| 172 | } |
| 173 | |
| 174 | /* Calculate PL1 value based on requested TDP */ |
| 175 | Method (TDPP, 1, NotSerialized) |
| 176 | { |
| 177 | Return (Multiply (ShiftLeft (Subtract (PUNI, 1), 2), Arg0)) |
| 178 | } |
| 179 | |
| 180 | /* Enable Controllable TDP to limit PL1 to requested value */ |
| 181 | Method (CTLE, 1, Serialized) |
| 182 | { |
| 183 | If (Acquire (CTCM, 100)) { |
| 184 | Return (0) |
| 185 | } |
| 186 | |
| 187 | Store ("Enable PL1 Limit", Debug) |
| 188 | |
| 189 | /* Set _PPC to LFM */ |
| 190 | Store (PSSS (LFM_), Local0) |
| 191 | Add (Local0, 1, PPCM) |
| 192 | \PPCN () |
| 193 | |
| 194 | /* Set TAR to LFM-1 */ |
| 195 | Subtract (LFM_, 1, TARS) |
| 196 | |
| 197 | /* Set PL1 to desired value */ |
| 198 | Store (PL1V, SPL1) |
| 199 | Store (TDPP (Arg0), PL1V) |
| 200 | |
| 201 | /* Set PL1 CLAMP bit */ |
| 202 | Store (One, PL1C) |
| 203 | |
| 204 | Release (CTCM) |
| 205 | Return (1) |
| 206 | } |
| 207 | |
| 208 | /* Disable Controllable TDP */ |
| 209 | Method (CTLD, 0, Serialized) |
| 210 | { |
| 211 | If (Acquire (CTCM, 100)) { |
| 212 | Return (0) |
| 213 | } |
| 214 | |
| 215 | Store ("Disable PL1 Limit", Debug) |
| 216 | |
| 217 | /* Clear PL1 CLAMP bit */ |
| 218 | Store (Zero, PL1C) |
| 219 | |
| 220 | /* Set PL1 to normal value */ |
| 221 | Store (SPL1, PL1V) |
| 222 | |
| 223 | /* Set TAR to 0 */ |
| 224 | Store (Zero, TARS) |
| 225 | |
| 226 | /* Set _PPC to 0 */ |
| 227 | Store (Zero, PPCM) |
| 228 | \PPCN () |
| 229 | |
| 230 | Release (CTCM) |
| 231 | Return (1) |
| 232 | } |
| 233 | } |