Angel Pons | 3bd1e3d | 2020-04-05 15:47:17 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 2 | |
Dinesh Gehlot | 770a46c | 2023-01-17 05:54:17 +0000 | [diff] [blame] | 3 | #include <gpio.h> |
Subrata Banik | e7ceae7 | 2017-03-08 17:59:40 +0530 | [diff] [blame] | 4 | #include <intelblocks/pcr.h> |
| 5 | #include <soc/pcr_ids.h> |
Lee Leahy | b000513 | 2015-05-12 18:19:47 -0700 | [diff] [blame] | 6 | #include <soc/pm.h> |
| 7 | |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 8 | static const struct reset_mapping rst_map[] = { |
| 9 | { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 0U << 30}, |
| 10 | { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30}, |
| 11 | { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30}, |
Aaron Durbin | ffdf901 | 2015-07-24 13:00:36 -0500 | [diff] [blame] | 12 | }; |
| 13 | |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 14 | static const struct reset_mapping rst_map_com2[] = { |
| 15 | { .logical = PAD_CFG0_LOGICAL_RESET_PWROK, .chipset = 0U << 30}, |
| 16 | { .logical = PAD_CFG0_LOGICAL_RESET_DEEP, .chipset = 1U << 30}, |
| 17 | { .logical = PAD_CFG0_LOGICAL_RESET_PLTRST, .chipset = 2U << 30}, |
| 18 | { .logical = PAD_CFG0_LOGICAL_RESET_RSMRST, .chipset = 3U << 30}, |
| 19 | }; |
| 20 | |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 21 | static const struct pad_group skl_community_com0_groups[] = { |
| 22 | INTEL_GPP(GPP_A0, GPP_A0, GPP_A23), /* GPP A */ |
| 23 | INTEL_GPP(GPP_A0, GPP_B0, GPP_B23), /* GPP B */ |
| 24 | }; |
| 25 | |
| 26 | static const struct pad_group skl_community_com1_groups[] = { |
| 27 | INTEL_GPP(GPP_C0, GPP_C0, GPP_C23), /* GPP C */ |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 28 | #if CONFIG(SKYLAKE_SOC_PCH_H) |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 29 | INTEL_GPP(GPP_C0, GPP_D0, GPP_D23), /* GPP D */ |
| 30 | INTEL_GPP(GPP_C0, GPP_E0, GPP_E12), /* GPP E */ |
| 31 | INTEL_GPP(GPP_C0, GPP_F0, GPP_F23), /* GPP F */ |
| 32 | INTEL_GPP(GPP_C0, GPP_G0, GPP_G23), /* GPP G */ |
| 33 | INTEL_GPP(GPP_C0, GPP_H0, GPP_H23), /* GPP H */ |
| 34 | #else |
| 35 | INTEL_GPP(GPP_C0, GPP_D0, GPP_D23), /* GPP D */ |
| 36 | INTEL_GPP(GPP_C0, GPP_E0, GPP_E23), /* GPP E */ |
| 37 | #endif |
| 38 | }; |
| 39 | |
| 40 | static const struct pad_group skl_community_com3_groups[] = { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 41 | #if CONFIG(SKYLAKE_SOC_PCH_H) |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 42 | INTEL_GPP(GPP_I0, GPP_I0, GPP_I10), /* GPP I */ |
| 43 | #else |
| 44 | INTEL_GPP(GPP_F0, GPP_F0, GPP_F23), /* GPP F */ |
| 45 | INTEL_GPP(GPP_F0, GPP_G0, GPP_G7), /* GPP G */ |
| 46 | #endif |
| 47 | }; |
| 48 | |
| 49 | static const struct pad_group skl_community_com2_groups[] = { |
| 50 | INTEL_GPP(GPD0, GPD0, GPD11), /* GPP GDP */ |
| 51 | }; |
| 52 | |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 53 | static const struct pad_community skl_gpio_communities[] = { |
Aaron Durbin | ffdf901 | 2015-07-24 13:00:36 -0500 | [diff] [blame] | 54 | { |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 55 | .port = PID_GPIOCOM0, |
| 56 | .first_pad = GPP_A0, |
| 57 | .last_pad = GPP_B23, |
| 58 | .num_gpi_regs = NUM_GPIO_COM0_GPI_REGS, |
| 59 | .pad_cfg_base = PAD_CFG_BASE, |
| 60 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 61 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 62 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 63 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 64 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 65 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 66 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 67 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 68 | .name = "GPIO_COM0", |
| 69 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 70 | .reset_map = rst_map, |
| 71 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 72 | .groups = skl_community_com0_groups, |
| 73 | .num_groups = ARRAY_SIZE(skl_community_com0_groups), |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 74 | }, { |
| 75 | .port = PID_GPIOCOM1, |
| 76 | .first_pad = GPP_C0, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 77 | #if CONFIG(SKYLAKE_SOC_PCH_H) |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 78 | .last_pad = GPP_H23, |
Li Cheng Sooi | 6a74053 | 2017-01-04 09:48:39 +0800 | [diff] [blame] | 79 | #else |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 80 | .last_pad = GPP_E23, |
Li Cheng Sooi | 6a74053 | 2017-01-04 09:48:39 +0800 | [diff] [blame] | 81 | #endif |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 82 | .num_gpi_regs = NUM_GPIO_COM1_GPI_REGS, |
| 83 | .pad_cfg_base = PAD_CFG_BASE, |
| 84 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 85 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 86 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 87 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 88 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 89 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 90 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 91 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 92 | .name = "GPIO_COM1", |
| 93 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 94 | .reset_map = rst_map, |
| 95 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 96 | .groups = skl_community_com1_groups, |
| 97 | .num_groups = ARRAY_SIZE(skl_community_com1_groups), |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 98 | }, { |
| 99 | .port = PID_GPIOCOM3, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 100 | #if CONFIG(SKYLAKE_SOC_PCH_H) |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 101 | .first_pad = GPP_I0, |
| 102 | .last_pad = GPP_I10, |
Li Cheng Sooi | 6a74053 | 2017-01-04 09:48:39 +0800 | [diff] [blame] | 103 | #else |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 104 | .first_pad = GPP_F0, |
| 105 | .last_pad = GPP_G7, |
Li Cheng Sooi | 6a74053 | 2017-01-04 09:48:39 +0800 | [diff] [blame] | 106 | #endif |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 107 | .num_gpi_regs = NUM_GPIO_COM3_GPI_REGS, |
| 108 | .pad_cfg_base = PAD_CFG_BASE, |
| 109 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 110 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 111 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 112 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 113 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 114 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 115 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 116 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 117 | .name = "GPIO_COM3", |
| 118 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 119 | .reset_map = rst_map, |
| 120 | .num_reset_vals = ARRAY_SIZE(rst_map), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 121 | .groups = skl_community_com3_groups, |
| 122 | .num_groups = ARRAY_SIZE(skl_community_com3_groups), |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 123 | }, { |
| 124 | .port = PID_GPIOCOM2, |
| 125 | .first_pad = GPD0, |
| 126 | .last_pad = GPD11, |
| 127 | .num_gpi_regs = NUM_GPIO_COM2_GPI_REGS, |
| 128 | .pad_cfg_base = PAD_CFG_BASE, |
| 129 | .host_own_reg_0 = HOSTSW_OWN_REG_0, |
Karthikeyan Ramasubramanian | c126084 | 2019-04-23 15:18:51 -0600 | [diff] [blame] | 130 | .gpi_int_sts_reg_0 = GPI_INT_STS_0, |
| 131 | .gpi_int_en_reg_0 = GPI_INT_EN_0, |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 132 | .gpi_smi_sts_reg_0 = GPI_SMI_STS_0, |
| 133 | .gpi_smi_en_reg_0 = GPI_SMI_EN_0, |
Michael Niewöhner | 51f5ff6 | 2020-11-23 22:05:36 +0100 | [diff] [blame] | 134 | .gpi_nmi_sts_reg_0 = GPI_NMI_STS_0, |
| 135 | .gpi_nmi_en_reg_0 = GPI_NMI_EN_0, |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 136 | .max_pads_per_group = GPIO_MAX_NUM_PER_GROUP, |
| 137 | .name = "GPIO_COM2", |
| 138 | .acpi_path = "\\_SB.PCI0.GPIO", |
| 139 | .reset_map = rst_map_com2, |
| 140 | .num_reset_vals = ARRAY_SIZE(rst_map_com2), |
Bora Guvendik | 3f67232 | 2017-11-22 13:48:12 -0800 | [diff] [blame] | 141 | .groups = skl_community_com2_groups, |
| 142 | .num_groups = ARRAY_SIZE(skl_community_com2_groups), |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 143 | } |
Aaron Durbin | ffdf901 | 2015-07-24 13:00:36 -0500 | [diff] [blame] | 144 | }; |
| 145 | |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 146 | const struct pad_community *soc_gpio_get_community(size_t *num_communities) |
| 147 | { |
| 148 | *num_communities = ARRAY_SIZE(skl_gpio_communities); |
| 149 | return skl_gpio_communities; |
| 150 | } |
| 151 | |
| 152 | const struct pmc_to_gpio_route *soc_pmc_gpio_routes(size_t *num) |
| 153 | { |
| 154 | static const struct pmc_to_gpio_route routes[] = { |
| 155 | { GPP_A, GPP_A}, |
| 156 | { GPP_B, GPP_B}, |
| 157 | { GPP_C, GPP_C}, |
| 158 | { GPP_D, GPP_D}, |
| 159 | { GPP_E, GPP_E}, |
| 160 | { GPP_F, GPP_F}, |
| 161 | { GPP_G, GPP_G}, |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 162 | #if CONFIG(SKYLAKE_SOC_PCH_H) |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 163 | { GPP_H, GPP_H}, |
| 164 | { GPP_I, GPP_I}, |
Li Cheng Sooi | 6a74053 | 2017-01-04 09:48:39 +0800 | [diff] [blame] | 165 | #endif |
Hannah Williams | 1760cd3 | 2017-04-06 20:54:11 -0700 | [diff] [blame] | 166 | { GPD, GPD}, |
| 167 | }; |
| 168 | *num = ARRAY_SIZE(routes); |
| 169 | return routes; |
Duncan Laurie | abdbed9 | 2016-06-30 09:34:24 -0700 | [diff] [blame] | 170 | } |
Kane Chen | 223ddc2 | 2019-02-12 21:14:13 +0800 | [diff] [blame] | 171 | |
| 172 | uint32_t soc_gpio_pad_config_fixup(const struct pad_config *cfg, |
| 173 | int dw_reg, uint32_t reg_val) |
| 174 | { |
Julius Werner | cd49cce | 2019-03-05 16:53:33 -0800 | [diff] [blame] | 175 | if (CONFIG(SKYLAKE_SOC_PCH_H)) |
Kane Chen | 223ddc2 | 2019-02-12 21:14:13 +0800 | [diff] [blame] | 176 | return reg_val; |
| 177 | /* |
| 178 | * For U/Y series, clear PAD_CFG1_TOL_1V8 in GPP_F4 |
| 179 | * ~ GPP_F11. |
| 180 | */ |
| 181 | if (cfg->pad >= GPP_F4 && cfg->pad <= GPP_F11 && dw_reg == 1) |
| 182 | reg_val = reg_val & ~(PAD_CFG1_TOL_1V8); |
| 183 | return reg_val; |
| 184 | |
| 185 | } |