| Angel Pons | 6bc1374 | 2020-04-05 15:46:38 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 2 | |
| Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 3 | #include <device/pci_type.h> |
| Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 4 | #include <intelblocks/xhci.h> |
| 5 | |
| 6 | #define XHCI_USB2_PORT_STATUS_REG 0x480 |
| Angel Pons | b36100f | 2020-09-07 13:18:10 +0200 | [diff] [blame] | 7 | #if CONFIG(SOC_INTEL_GEMINILAKE) |
| Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 8 | #define XHCI_USB3_PORT_STATUS_REG 0x510 |
| 9 | #define XHCI_USB2_PORT_NUM 9 |
| 10 | #else |
| 11 | #define XHCI_USB3_PORT_STATUS_REG 0x500 |
| 12 | #define XHCI_USB2_PORT_NUM 8 |
| 13 | #endif |
| 14 | #define XHCI_USB3_PORT_NUM 7 |
| 15 | |
| 16 | static const struct xhci_usb_info usb_info = { |
| 17 | .usb2_port_status_reg = XHCI_USB2_PORT_STATUS_REG, |
| 18 | .num_usb2_ports = XHCI_USB2_PORT_NUM, |
| 19 | .usb3_port_status_reg = XHCI_USB3_PORT_STATUS_REG, |
| 20 | .num_usb3_ports = XHCI_USB3_PORT_NUM, |
| 21 | }; |
| 22 | |
| Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 23 | const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev) |
| Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 24 | { |
| Tim Wawrzynczak | 56fcfb5 | 2020-11-10 13:39:37 -0700 | [diff] [blame] | 25 | /* Apollo Lake only has one XHCI controller */ |
| Karthikeyan Ramasubramanian | 0f71831 | 2019-07-03 13:02:37 -0600 | [diff] [blame] | 26 | return &usb_info; |
| 27 | } |