blob: 79d4d079fec1fa1bb5bc2e0cc663fa72d0da5646 [file] [log] [blame]
Martin Roth1a3de8e2022-10-06 15:57:21 -06001/* SPDX-License-Identifier: GPL-2.0-only */
2
Martin Roth1a3de8e2022-10-06 15:57:21 -06003#include <amdblocks/gpio.h>
4#include <amdblocks/smi.h>
Jon Murphydf2edde2023-04-06 17:15:14 -06005#include <amdblocks/xhci.h>
Martin Roth1a3de8e2022-10-06 15:57:21 -06006#include <bootstate.h>
7#include <device/device.h>
8#include <device/pci_ids.h>
9#include <drivers/usb/pci_xhci/pci_xhci.h>
10#include <soc/pci_devs.h>
11#include <soc/smi.h>
12
13static const struct sci_source xhci_sci_sources[] = {
14 {
15 .scimap = SMITYPE_XHC0_PME,
Jon Murphydf2edde2023-04-06 17:15:14 -060016 .gpe = XHCI_GEVENT,
Martin Roth1a3de8e2022-10-06 15:57:21 -060017 .direction = SMI_SCI_LVL_HIGH,
18 .level = SMI_SCI_EDG
19 },
20 {
21 .scimap = SMITYPE_XHC1_PME,
Jon Murphydf2edde2023-04-06 17:15:14 -060022 .gpe = XHCI_GEVENT,
Martin Roth1a3de8e2022-10-06 15:57:21 -060023 .direction = SMI_SCI_LVL_HIGH,
24 .level = SMI_SCI_EDG
Felix Held5cabc292023-04-21 16:17:21 +020025 },
26 {
27 .scimap = SMITYPE_XHC3_PME,
28 .gpe = XHCI_GEVENT,
29 .direction = SMI_SCI_LVL_HIGH,
30 .level = SMI_SCI_EDG
31 },
32 {
33 .scimap = SMITYPE_XHC4_PME,
34 .gpe = XHCI_GEVENT,
35 .direction = SMI_SCI_LVL_HIGH,
36 .level = SMI_SCI_EDG
Martin Roth1a3de8e2022-10-06 15:57:21 -060037 }
38};
39
40enum cb_err pci_xhci_get_wake_gpe(const struct device *dev, int *gpe)
41{
Arthur Heymans7fcd4d52023-08-24 15:12:19 +020042 if (dev->upstream->dev->path.type != DEVICE_PATH_PCI)
Martin Roth1a3de8e2022-10-06 15:57:21 -060043 return CB_ERR_ARG;
44
45 if (dev->path.type != DEVICE_PATH_PCI)
46 return CB_ERR_ARG;
47
Arthur Heymans7fcd4d52023-08-24 15:12:19 +020048 if (dev->upstream->dev->path.pci.devfn == PCIE_ABC_A_DEVFN) {
Martin Roth1a3de8e2022-10-06 15:57:21 -060049 if (dev->path.pci.devfn == XHCI0_DEVFN) {
50 *gpe = xhci_sci_sources[0].gpe;
51 return CB_SUCCESS;
52 } else if (dev->path.pci.devfn == XHCI1_DEVFN) {
53 *gpe = xhci_sci_sources[1].gpe;
54 return CB_SUCCESS;
55 }
Martin Roth1a3de8e2022-10-06 15:57:21 -060056 }
57
Arthur Heymans7fcd4d52023-08-24 15:12:19 +020058 if (dev->upstream->dev->path.pci.devfn == PCIE_ABC_C_DEVFN) {
Felix Held5cabc292023-04-21 16:17:21 +020059 if (dev->path.pci.devfn == USB4_XHCI0_DEVFN) {
60 *gpe = xhci_sci_sources[2].gpe;
61 return CB_SUCCESS;
62 } else if (dev->path.pci.devfn == USB4_XHCI1_DEVFN) {
63 *gpe = xhci_sci_sources[3].gpe;
64 return CB_SUCCESS;
65 }
66 }
67
Martin Roth1a3de8e2022-10-06 15:57:21 -060068 return CB_ERR_ARG;
69}
70
71static void configure_xhci_sci(void *unused)
72{
Fred Reitberger88fefd42023-04-19 16:06:38 -040073 gpe_configure_sci(xhci_sci_sources, ARRAY_SIZE(xhci_sci_sources));
Martin Roth1a3de8e2022-10-06 15:57:21 -060074}
75
76BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL);