blob: e9a7496aff315b3535bd5897a97ef613b26b73fb [file] [log] [blame]
Felix Held62ef88f2020-12-08 23:18:19 +01001/* SPDX-License-Identifier: GPL-2.0-only */
2
3#include <stdint.h>
4#include <amdblocks/acpimmio.h>
5#include <amdblocks/aoac.h>
Felix Held117823e2021-06-15 16:33:29 +02006#include <soc/aoac_defs.h>
Felix Held62ef88f2020-12-08 23:18:19 +01007#include <soc/southbridge.h>
8#include <delay.h>
9
Felix Held62ef88f2020-12-08 23:18:19 +010010#if CONFIG(AMD_SOC_CONSOLE_UART) && FCH_AOAC_UART_FOR_CONSOLE == -1
11# error Unsupported UART_FOR_CONSOLE chosen
12#endif
13
14/*
15 * Table of devices that need their AOAC registers enabled and waited
16 * upon (usually about .55 milliseconds). Instead of individual delays
17 * waiting for each device to become available, a single delay will be
18 * executed. The console UART is handled separately from this table.
19 *
20 * TODO: Find out which I2C controllers we really need to enable here.
21 */
Elyes Haouas24769422023-01-12 06:21:42 +010022static const unsigned int aoac_devs[] = {
Felix Held62ef88f2020-12-08 23:18:19 +010023 FCH_AOAC_DEV_AMBA,
24 FCH_AOAC_DEV_I2C0,
25 FCH_AOAC_DEV_I2C1,
26 FCH_AOAC_DEV_I2C2,
27 FCH_AOAC_DEV_I2C3,
28 FCH_AOAC_DEV_ESPI,
29};
30
31void wait_for_aoac_enabled(unsigned int dev)
32{
33 while (!is_aoac_device_enabled(dev))
34 udelay(100);
35}
36
37void enable_aoac_devices(void)
38{
39 unsigned int i;
40
41 for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
42 power_on_aoac_device(aoac_devs[i]);
43
44 if (CONFIG(AMD_SOC_CONSOLE_UART))
45 power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
46
47 /* Wait for AOAC devices to indicate power and clock OK */
48 for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
49 wait_for_aoac_enabled(aoac_devs[i]);
50
51 if (CONFIG(AMD_SOC_CONSOLE_UART))
52 wait_for_aoac_enabled(FCH_AOAC_UART_FOR_CONSOLE);
53}