| Matt DeVillier | ec926e0 | 2020-04-21 11:52:58 -0500 | [diff] [blame] | 1 | FLASH 16M { |
| 2 | SI_DESC@0x0 0x1000 |
| Matt DeVillier | 8f9ee36 | 2021-06-23 14:35:33 -0500 | [diff] [blame] | 3 | SI_BIOS@0x1000 0xf7e000 { |
| Matt DeVillier | ec926e0 | 2020-04-21 11:52:58 -0500 | [diff] [blame] | 4 | IFWI@0x0 0x1ff000 |
| 5 | # SMMSTORE requires 64k alignment |
| Arthur Heymans | 9813544 | 2022-02-02 21:26:48 +0100 | [diff] [blame] | 6 | SMMSTORE@0xa4f000 0x40000 |
| Matt DeVillier | 85cd9a1 | 2020-05-02 21:21:37 -0500 | [diff] [blame] | 7 | UNIFIED_MRC_CACHE 0x21000 { |
| 8 | RECOVERY_MRC_CACHE 0x10000 |
| 9 | RW_MRC_CACHE 0x10000 |
| 10 | RW_VAR_MRC_CACHE 0x1000 |
| 11 | } |
| Matt DeVillier | 0294488 | 2022-03-24 11:23:49 -0500 | [diff] [blame] | 12 | RO_VPD 0x4000 |
| Matt DeVillier | ec926e0 | 2020-04-21 11:52:58 -0500 | [diff] [blame] | 13 | FMAP 0x300 |
| 14 | COREBOOT(CBFS) |
| 15 | BIOS_UNUSABLE 0x4f000 |
| 16 | } |
| 17 | DEVICE_EXTENSION@0xf7f000 0x80000 |
| 18 | # Currently, it is required that the BIOS region be a multiple of 8KiB. |
| 19 | # This is required so that the recovery mechanism can find SIGN_CSE |
| 20 | # region aligned to 4K at the center of BIOS region. Since the |
| 21 | # descriptor at the beginning uses 4K and BIOS starts at an offset of |
| 22 | # 4K, a hole of 4K is created towards the end of the flash to compensate |
| 23 | # for the size requirement of BIOS region. |
| 24 | # FIT tool thus creates descriptor with following regions: |
| 25 | # Descriptor --> 0 to 4K |
| 26 | # BIOS --> 4K to 0xf7f000 |
| 27 | # Device ext --> 0xf7f000 to 0xfff000 |
| 28 | UNUSED_HOLE@0xfff000 0x1000 |
| 29 | } |