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Angel Pons8a3453f2020-04-02 23:48:19 +02001/* SPDX-License-Identifier: GPL-2.0-only */
V Sowmya9f8023a2017-02-28 17:52:05 +05302
3#ifndef __INTEL_MIPI_CAMERA_CHIP_H__
4#define __INTEL_MIPI_CAMERA_CHIP_H__
5
6#include <stdint.h>
Matt Delco1ffee9d2020-06-17 12:55:35 +05307#include <acpi/acpi_pld.h>
V Sowmya9f8023a2017-02-28 17:52:05 +05308
Matt Delco1245b1e2020-06-17 07:26:55 +05309#define DEFAULT_LINK_FREQ 450000000
10#define MAX_PWDB_ENTRIES 12
11#define MAX_PORT_ENTRIES 4
12#define MAX_LINK_FREQ_ENTRIES 4
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +053013#define MAX_CLK_CONFIGS 2
14#define MAX_GPIO_CONFIGS 4
Varshit B Pandya5f721792022-01-17 18:22:56 +053015#define MAX_PWR_OPS 6
Sugnan Prabhu S6d9f2432020-07-02 13:02:23 +053016#define MAX_GUARDED_RESOURCES 10
Varshit B Pandya4113bc02021-05-31 16:49:41 +053017#define IMGCLKOUT_0 0
18#define IMGCLKOUT_1 1
19#define IMGCLKOUT_2 2
20#define IMGCLKOUT_3 3
21#define IMGCLKOUT_4 4
22#define IMGCLKOUT_5 5
23#define FREQ_24_MHZ 0
24#define FREQ_19_2_MHZ 1
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +053025
26#define SEQ_OPS_CLK_ENABLE(ind, delay) \
27 { .type = IMGCLK, .index = (ind), .action = ENABLE, .delay_ms = (delay) }
28#define SEQ_OPS_CLK_DISABLE(ind, delay) \
29 { .type = IMGCLK, .index = (ind), .action = DISABLE, .delay_ms = (delay) }
30#define SEQ_OPS_GPIO_ENABLE(ind, delay) \
31 { .type = GPIO, .index = (ind), .action = ENABLE, .delay_ms = (delay) }
32#define SEQ_OPS_GPIO_DISABLE(ind, delay) \
33 { .type = GPIO, .index = (ind), .action = DISABLE, .delay_ms = (delay) }
Matt Delco1245b1e2020-06-17 07:26:55 +053034
35enum camera_device_type {
36 DEV_TYPE_SENSOR = 0,
37 DEV_TYPE_VCM,
38 DEV_TYPE_ROM
39};
40
41enum intel_camera_platform_type {
42 PLATFORM_SKC = 9,
43 PLATFORM_CNL = 10
44};
45
46enum intel_camera_flash_type {
47 FLASH_DEFAULT = 0,
48 FLASH_DISABLE = 2,
49 FLASH_ENABLE = 3
50};
51
52enum intel_camera_led_type {
53 PRIVACY_LED_DEFAULT = 0,
54 PRIVACY_LED_A_16mA
55};
56
57enum intel_camera_mipi_info {
58 MIPI_INFO_SENSOR_DRIVER = 0,
59 MIPI_INFO_ACPI_DEFINED
60};
61
62#define CLK_FREQ_19_2MHZ 19200000
63#define CLK_FREQ_24MHZ 24000000
64#define CLK_FREQ_20MHZ 20000000
V Sowmya9f8023a2017-02-28 17:52:05 +053065
66enum intel_camera_device_type {
67 INTEL_ACPI_CAMERA_CIO2,
68 INTEL_ACPI_CAMERA_IMGU,
69 INTEL_ACPI_CAMERA_SENSOR,
70 INTEL_ACPI_CAMERA_VCM,
Matt Delco7d002932020-06-16 11:39:52 +053071 INTEL_ACPI_CAMERA_NVM,
V Sowmya9f8023a2017-02-28 17:52:05 +053072 INTEL_ACPI_CAMERA_PMIC = 100,
73};
74
75enum intel_power_action_type {
76 INTEL_ACPI_CAMERA_REGULATOR,
77 INTEL_ACPI_CAMERA_CLK,
78 INTEL_ACPI_CAMERA_GPIO,
79};
80
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +053081enum ctrl_type {
Sugnan Prabhu S6d9f2432020-07-02 13:02:23 +053082 UNKNOWN_CTRL,
83 IMGCLK,
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +053084 GPIO
85};
86
87enum action_type {
Sugnan Prabhu S6d9f2432020-07-02 13:02:23 +053088 UNKNOWN_ACTION,
89 ENABLE,
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +053090 DISABLE
91};
92
Sugnan Prabhu S6d9f2432020-07-02 13:02:23 +053093struct camera_resource {
94 uint8_t type;
95 uint8_t id;
96};
97
98struct camera_resource_manager {
99 uint8_t cnt;
100 struct camera_resource resource[MAX_GUARDED_RESOURCES];
101};
102
103struct resource_config {
104 enum action_type action;
105 enum ctrl_type type;
106 union {
107 const struct clk_config *clk_conf;
108 const struct gpio_config *gpio_conf;
109 };
110};
111
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530112struct clk_config {
113 /* IMGCLKOUT_x being used for a port */
114 uint8_t clknum;
Martin Roth74f18772023-09-03 21:38:29 -0600115 /* frequency setting: 0:24MHz, 1:19.2 MHz */
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530116 uint8_t freq;
Sugnan Prabhu S9418e332021-06-16 14:43:11 +0530117};
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530118
119struct gpio_config {
Varshit B Pandya6a103902021-06-15 20:26:45 +0530120 uint16_t gpio_num;
Sugnan Prabhu S9418e332021-06-16 14:43:11 +0530121};
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530122
123struct clock_ctrl_panel {
124 struct clk_config clks[MAX_CLK_CONFIGS];
Sugnan Prabhu S9418e332021-06-16 14:43:11 +0530125};
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530126
127struct gpio_ctrl_panel {
128 struct gpio_config gpio[MAX_GPIO_CONFIGS];
Sugnan Prabhu S9418e332021-06-16 14:43:11 +0530129};
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530130
131struct operation_type {
132 enum ctrl_type type;
133 uint8_t index;
134 enum action_type action;
135 uint32_t delay_ms;
Sugnan Prabhu S9418e332021-06-16 14:43:11 +0530136};
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530137
138struct operation_seq {
139 struct operation_type ops[MAX_PWR_OPS];
140 uint8_t ops_cnt;
Sugnan Prabhu S9418e332021-06-16 14:43:11 +0530141};
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530142
V Sowmya9f8023a2017-02-28 17:52:05 +0530143struct intel_ssdb {
144 uint8_t version; /* Current version */
145 uint8_t sensor_card_sku; /* CRD Board type */
146 uint8_t csi2_data_stream_interface[16]; /* CSI2 data stream GUID */
147 uint16_t bdf_value; /* Bus number of the host
148 controller */
149 uint32_t dphy_link_en_fuses; /* Host controller's fuses
150 information used to verify if
151 link is fused out or not */
152 uint32_t lanes_clock_division; /* Lanes/clock divisions per
153 sensor */
154 uint8_t link_used; /* Link used by this sensor
155 stream */
156 uint8_t lanes_used; /* Number of lanes connected for
157 the sensor */
158 uint32_t csi_rx_dly_cnt_termen_clane; /* MIPI timing information */
159 uint32_t csi_rx_dly_cnt_settle_clane; /* MIPI timing information */
160 uint32_t csi_rx_dly_cnt_termen_dlane0; /* MIPI timing information */
161 uint32_t csi_rx_dly_cnt_settle_dlane0; /* MIPI timing information */
162 uint32_t csi_rx_dly_cnt_termen_dlane1; /* MIPI timing information */
163 uint32_t csi_rx_dly_cnt_settle_dlane1; /* MIPI timing information */
164 uint32_t csi_rx_dly_cnt_termen_dlane2; /* MIPI timing information */
165 uint32_t csi_rx_dly_cnt_settle_dlane2; /* MIPI timing information */
166 uint32_t csi_rx_dly_cnt_termen_dlane3; /* MIPI timing information */
167 uint32_t csi_rx_dly_cnt_settle_dlane3; /* MIPI timing information */
168 uint32_t max_lane_speed; /* Maximum lane speed for
169 the sensor */
170 uint8_t sensor_cal_file_idx; /* Legacy field for sensor
171 calibration file index */
172 uint8_t sensor_cal_file_idx_mbz[3]; /* Legacy field for sensor
173 calibration file index */
174 uint8_t rom_type; /* NVM type of the camera
175 module */
176 uint8_t vcm_type; /* VCM type of the camera
177 module */
178 uint8_t platform; /* Platform information */
179 uint8_t platform_sub; /* Platform sub-categories */
180 uint8_t flash_support; /* Enable/disable flash
181 support */
182 uint8_t privacy_led; /* Privacy LED support */
183 uint8_t degree; /* Camera Orientation */
184 uint8_t mipi_define; /* MIPI info defined in ACPI or
185 sensor driver */
Matt Delco1245b1e2020-06-17 07:26:55 +0530186 uint32_t mclk_speed; /* Clock info for sensor */
V Sowmya9f8023a2017-02-28 17:52:05 +0530187 uint32_t mclk; /* Clock info for sensor */
188 uint8_t control_logic_id; /* PMIC device node used for
189 the camera sensor */
190 uint8_t mipi_data_format; /* MIPI data format */
191 uint8_t silicon_version; /* Silicon version */
192 uint8_t customer_id; /* Customer ID */
Matt Delco1245b1e2020-06-17 07:26:55 +0530193 uint8_t mclk_port;
194 uint8_t reserved[13]; /* Pads SSDB out so the binary blob in ACPI is
195 the same size as seen on other firmwares.*/
Stefan Reinauer6a001132017-07-13 02:20:27 +0200196} __packed;
V Sowmya9f8023a2017-02-28 17:52:05 +0530197
198struct intel_pwdb {
199 char name[32]; /* Name of the resource required by the power
200 action */
201 uint32_t value; /* The value to be set for the power action */
202 uint32_t entry_type; /* The type of the current power action */
203 uint32_t delay_usec; /* The delay time after which power action is
204 performed and this is in unit of usec */
Stefan Reinauer6a001132017-07-13 02:20:27 +0200205} __packed;
V Sowmya9f8023a2017-02-28 17:52:05 +0530206
207struct drivers_intel_mipi_camera_config {
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530208 struct clock_ctrl_panel clk_panel;
209 struct gpio_ctrl_panel gpio_panel;
210 struct operation_seq on_seq;
211 struct operation_seq off_seq;
212
V Sowmya9f8023a2017-02-28 17:52:05 +0530213 struct intel_ssdb ssdb;
214 struct intel_pwdb pwdb[MAX_PWDB_ENTRIES];
215 enum intel_camera_device_type device_type;
216 uint8_t num_pwdb_entries;
217 const char *acpi_hid;
218 const char *acpi_name;
219 const char *chip_name;
220 unsigned int acpi_uid;
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530221 const char *pr0;
Matt Delco1245b1e2020-06-17 07:26:55 +0530222
Matt Delco879b3c12020-06-17 13:10:22 +0530223 /* Settings specific to CIO2 device */
224 uint32_t cio2_num_ports;
225 uint32_t cio2_lanes_used[MAX_PORT_ENTRIES];
226 const char *cio2_lane_endpoint[MAX_PORT_ENTRIES];
227 uint32_t cio2_prt[MAX_PORT_ENTRIES];
228
Matt Delco1245b1e2020-06-17 07:26:55 +0530229 /* Settings specific to camera sensor */
230 bool disable_ssdb_defaults;
231
232 uint8_t num_freq_entries; /* # of elements in link_freq */
233 uint32_t link_freq[MAX_LINK_FREQ_ENTRIES];
234 const char *sensor_name; /* default "UNKNOWN" */
Matt Delco7d002932020-06-16 11:39:52 +0530235 const char *remote_name; /* default "\_SB.PCI0.CIO2" */
236 const char *vcm_name; /* defaults to |vcm_address| device */
Matt Delco1ffee9d2020-06-17 12:55:35 +0530237 bool use_pld;
238 bool disable_pld_defaults;
239 struct acpi_pld pld;
Matt Delco7d002932020-06-16 11:39:52 +0530240 uint16_t rom_address; /* I2C to use if ssdb.rom_type != 0 */
241 uint16_t vcm_address; /* I2C to use if ssdb.vcm_type != 0 */
Matt Delcoc3a83bf2020-06-16 12:02:34 +0530242 /*
243 * Settings specific to nvram. Many values, if left as zero, will be assigned a default.
244 * Set disable_nvm_defaults to non-zero if you want to disable the defaulting behavior
245 * so you can use zero for a value.
246 */
247 bool disable_nvm_defaults;
248 uint32_t nvm_size;
249 uint32_t nvm_pagesize;
250 uint32_t nvm_readonly;
251 uint32_t nvm_width;
Pandya, Varshit Bcd91db92020-09-03 20:38:46 +0530252 const char *nvm_compat;
Matt Delcoc3a83bf2020-06-16 12:02:34 +0530253
254 /* Settings specific to vcm */
255 const char *vcm_compat;
Sugnan Prabhu Sb087a942020-05-21 20:41:03 +0530256 /* Does the device have a power resource entries */
257 bool has_power_resource;
Sugnan Prabhu S60be9db2021-02-09 10:31:15 +0530258 /* Perform low power probe */
259 bool low_power_probe;
Varshit B Pandya04e8c2b2021-10-27 10:41:32 +0530260 /*
261 * This will create a _DSC method in ACPI which returns an integer, to tell the kernel
262 * the highest allowed D state for a device during probe
263 * Number State Description
264 * 0 D0 Device fully powered on
265 * 1 D1
266 * 2 D2
267 * 3 D3hot
268 * 4 D3cold Off
269 */
270 uint8_t max_dstate_for_probe;
V Sowmya9f8023a2017-02-28 17:52:05 +0530271};
272
273#endif