Frank Wu | bc83738 | 2020-03-13 16:41:10 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Frank Wu | bc83738 | 2020-03-13 16:41:10 +0800 | [diff] [blame] | 2 | |
Nick Vaccaro | 2f78ce0 | 2021-02-16 19:06:16 -0800 | [diff] [blame] | 3 | #include <acpi/acpi.h> |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 4 | #include <variant/gpio.h> |
Frank Wu | bc83738 | 2020-03-13 16:41:10 +0800 | [diff] [blame] | 5 | #include <baseboard/variants.h> |
| 6 | #include <commonlib/helpers.h> |
| 7 | |
| 8 | /* Pad configuration in ramstage */ |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 9 | /* Leave eSPI pins untouched from default settings */ |
Frank Wu | bc83738 | 2020-03-13 16:41:10 +0800 | [diff] [blame] | 10 | static const struct pad_config gpio_table[] = { |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 11 | /* A0 thru A6 come configured out of reset, do not touch */ |
| 12 | /* A0 : ESPI_IO0 ==> ESPI_IO_0 */ |
| 13 | /* A1 : ESPI_IO1 ==> ESPI_IO_1 */ |
| 14 | /* A2 : ESPI_IO2 ==> ESPI_IO_2 */ |
| 15 | /* A3 : ESPI_IO3 ==> ESPI_IO_3 */ |
| 16 | /* A4 : ESPI_CS# ==> ESPI_CS_L */ |
| 17 | /* A5 : ESPI_CLK ==> ESPI_CLK */ |
| 18 | /* A6 : ESPI_RESET# ==> NC(TP764) */ |
| 19 | /* A7 : I2S2_SCLK ==> I2S1_SCLK */ |
| 20 | PAD_CFG_NF(GPP_A7, NONE, DEEP, NF1), |
Matt DeVillier | 7ed6130 | 2022-12-21 08:38:17 -0600 | [diff] [blame^] | 21 | /* A8 : I2S2_SFRM ==> EN_PP3300_TOUCHSCREEN */ |
| 22 | PAD_CFG_GPO(GPP_A8, 1, DEEP), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 23 | /* A9 : I2S2_TXD ==> I2S1_TXD */ |
| 24 | PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1), |
| 25 | /* A10 : I2S2_RXD ==> I2S1_RXD */ |
| 26 | PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1), |
Frank Wu | 1d7ba15 | 2020-08-11 16:04:45 +0800 | [diff] [blame] | 27 | /* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */ |
| 28 | PAD_CFG_GPO(GPP_A13, 1, DEEP), |
Eric Lai | 32d5128 | 2020-08-21 11:34:01 +0800 | [diff] [blame] | 29 | /* A14 : DDSP_HPD3 ==> USB_C2_DP_HPD */ |
| 30 | PAD_CFG_NF(GPP_A14, NONE, DEEP, NF2), |
| 31 | /* A16 : USB_OC3# ==> USB_C0_OC_OD# */ |
| 32 | PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 33 | /* A18 : DDSP_HPDB ==> NC */ |
| 34 | PAD_NC(GPP_A18, NONE), |
Eric Lai | 32d5128 | 2020-08-21 11:34:01 +0800 | [diff] [blame] | 35 | /* A19 : DDSP_HPD1 ==> USB_C0_DP_HPD */ |
| 36 | PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), |
| 37 | /* A20 : DDSP_HPD2 ==> USB_C1_DP_HPD */ |
| 38 | PAD_CFG_NF(GPP_A20, NONE, DEEP, NF1), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 39 | /* A22 : DDPC_CTRLDATA ==> NC */ |
| 40 | PAD_NC(GPP_A22, NONE), |
| 41 | /* A23 : I2S1_SCLK ==> HP_INT_L */ |
| 42 | PAD_CFG_GPI_INT(GPP_A23, NONE, PLTRST, EDGE_BOTH), |
Frank Wu | bc83738 | 2020-03-13 16:41:10 +0800 | [diff] [blame] | 43 | |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 44 | /* B2 : VRALERT# ==> NC */ |
| 45 | PAD_NC(GPP_B2, NONE), |
| 46 | /* B3 : CPU_GP2 ==> NC */ |
| 47 | PAD_NC(GPP_B3, NONE), |
| 48 | /* B5 : ISH_I2C0_CVF_SDA ==> NC */ |
| 49 | PAD_NC(GPP_B5, NONE), |
| 50 | /* B6 : ISH_I2C0_CVF_SCL ==> NC */ |
| 51 | PAD_NC(GPP_B6, NONE), |
| 52 | /* B7 : ISH_12C1_SDA ==> I2C_SENSOR_SDA */ |
| 53 | PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1), |
| 54 | /* B8 : ISH_I2C1_SCL ==> I2C_SENSOR_SCL */ |
| 55 | PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1), |
John Su | 3b9041a | 2020-08-17 19:33:13 +0800 | [diff] [blame] | 56 | /* B9 : I2C5_SDA ==> PCH_I2C5_TRACKPAD_SDA */ |
| 57 | PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1), |
| 58 | /* B10 : I2C5_SCL ==> PCH_I2C5_TRACKPAD_SCL */ |
| 59 | PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1), |
John Su | 830c77e | 2020-08-19 18:37:22 +0800 | [diff] [blame] | 60 | /* B19 : GSPI1_CS0# ==> PCH_GSPI1_FPMCU_CS_L */ |
| 61 | PAD_CFG_NF(GPP_B19, NONE, DEEP, NF1), |
| 62 | /* B20 : GSPI1_CLK ==> PCH_GSPI1_FPMCU_CLK */ |
| 63 | PAD_CFG_NF(GPP_B20, NONE, DEEP, NF1), |
| 64 | /* B21 : GSPI1_MISO ==> PCH_GSPI1_FPMCU_MISO */ |
| 65 | PAD_CFG_NF(GPP_B21, NONE, DEEP, NF1), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 66 | |
| 67 | /* C1 : SMBDATA ==> FPMCU_BOOT1 */ |
| 68 | PAD_CFG_GPO(GPP_C1, 0, DEEP), |
| 69 | /* C7 : SML1DATA ==> NC */ |
| 70 | PAD_NC(GPP_C7, NONE), |
| 71 | /* C10 : UART0_RTS# ==> USI_RST_L */ |
| 72 | PAD_CFG_GPO(GPP_C10, 1, DEEP), |
| 73 | /* C11 : UART0_CTS# ==> NC */ |
| 74 | PAD_NC(GPP_C11, NONE), |
| 75 | /* C13 : UART1_TXD ==> NC */ |
| 76 | PAD_NC(GPP_C13, NONE), |
John Su | 830c77e | 2020-08-19 18:37:22 +0800 | [diff] [blame] | 77 | /* C20 : UART2_RXD ==> FPMCU_INT_L */ |
| 78 | PAD_CFG_GPI_INT(GPP_C20, NONE, PLTRST, LEVEL), |
| 79 | /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ |
| 80 | PAD_CFG_GPO(GPP_C22, 0, DEEP), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 81 | |
| 82 | /* D7 : SRCCLKREQ2# ==> NC */ |
| 83 | PAD_NC(GPP_D7, NONE), |
Frank Wu | 9c7c09f | 2020-08-04 16:38:51 +0800 | [diff] [blame] | 84 | /* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */ |
| 85 | PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 86 | /* D9 : ISH_SPI_CS# ==> TBT_LSX2_TXD */ |
| 87 | PAD_CFG_NF(GPP_D9, NONE, DEEP, NF4), |
| 88 | /* D10 : ISH_SPI_CLK ==> TBT_LSX2_RXD */ |
| 89 | PAD_CFG_NF(GPP_D10, NONE, DEEP, NF4), |
| 90 | /* D11 : ISH_SPI_MISO ==> NC */ |
| 91 | PAD_NC(GPP_D11, NONE), |
| 92 | /* D12 : ISH_SPI_MOSI ==> NC */ |
| 93 | PAD_NC(GPP_D12, NONE), |
Frank Wu | 9c7c09f | 2020-08-04 16:38:51 +0800 | [diff] [blame] | 94 | /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ |
| 95 | PAD_CFG_GPO(GPP_D16, 1, DEEP), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 96 | |
| 97 | /* E0 : SATAXPCIE0 ==> NC */ |
| 98 | PAD_NC(GPP_E0, NONE), |
| 99 | /* E1 : SPI1_IO2 ==> NC */ |
| 100 | PAD_NC(GPP_E1, NONE), |
| 101 | /* E2 : SPI1_IO3 ==> NC */ |
| 102 | PAD_NC(GPP_E2, NONE), |
| 103 | /* E5 : SATA_DEVSLP1 ==> NC */ |
| 104 | PAD_NC(GPP_E5, NONE), |
| 105 | /* E10 : SPI1_CS# ==> NC */ |
| 106 | PAD_NC(GPP_E10, NONE), |
Frank Wu | 9c7c09f | 2020-08-04 16:38:51 +0800 | [diff] [blame] | 107 | /* E11 : SPI1_CLK ==> SD_PE_WAKE_ODL */ |
| 108 | PAD_CFG_GPI(GPP_E11, NONE, DEEP), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 109 | /* E12 : SPI1_MISO_IO1 ==> NC */ |
| 110 | PAD_NC(GPP_E12, NONE), |
| 111 | /* E13 : SPI1_MOSI_IO0 ==> NC */ |
| 112 | PAD_NC(GPP_E13, NONE), |
John Su | 3b9041a | 2020-08-17 19:33:13 +0800 | [diff] [blame] | 113 | /* E15 : ISH_GP6 ==> TRACKPAD_INT_ODL */ |
| 114 | PAD_CFG_GPI_IRQ_WAKE(GPP_E15, NONE, DEEP, LEVEL, INVERT), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 115 | /* E16 : ISH_GP7 ==> SD_PRSNT# */ |
| 116 | PAD_CFG_GPI(GPP_E16, NONE, DEEP), |
| 117 | /* E17 : THC0_SPI1_INT# ==> NC */ |
| 118 | PAD_NC(GPP_E17, NONE), |
| 119 | /* E22 : DDPA_CTRLCLK ==> NC */ |
| 120 | PAD_NC(GPP_E22, NONE), |
| 121 | /* E23 : DDPA_CTRLDATA ==> NC */ |
| 122 | PAD_NC(GPP_E23, NONE), |
| 123 | |
| 124 | /* F8 : I2S_MCLK2_INOUT ==> NC */ |
| 125 | PAD_NC(GPP_F8, NONE), |
| 126 | /* F10 : GPPF10_STRAP */ |
| 127 | PAD_NC(GPP_F10, NONE), |
| 128 | /* F11 : THC1_SPI2_CLK ==> NC */ |
| 129 | PAD_NC(GPP_F11, NONE), |
| 130 | /* F12 : GSXDOUT ==> EN_PP3300_TRACKPAD */ |
| 131 | PAD_CFG_GPO(GPP_F12, 1, DEEP), |
Frank Wu | 1d7ba15 | 2020-08-11 16:04:45 +0800 | [diff] [blame] | 132 | /* F13 : GSXDOUT ==> WiFi_DISABLE_L */ |
| 133 | PAD_CFG_GPO(GPP_F13, 1, DEEP), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 134 | /* F14 : GSXDIN ==> NC */ |
| 135 | PAD_NC(GPP_F14, NONE), |
| 136 | /* F15 : GSXSRESET# ==> NC */ |
| 137 | PAD_NC(GPP_F15, NONE), |
| 138 | /* F16 : GSXCLK ==> EN_PP3300_TOUCHSCREEN */ |
| 139 | PAD_CFG_GPO(GPP_F16, 1, DEEP), |
| 140 | /* F17 : WWAN_RF_DISABLE_ODL ==> EC_IN_RW_OD */ |
| 141 | PAD_CFG_GPI(GPP_F17, NONE, DEEP), |
| 142 | /* F18 : THC1_SPI2_INT# ==> EN_SPKR_PA */ |
| 143 | PAD_CFG_GPO(GPP_F18, 1, DEEP), |
| 144 | /* F19 : SRCCLKREQ6# ==> NC */ |
| 145 | PAD_NC(GPP_F19, NONE), |
| 146 | |
Frank Wu | 9c7c09f | 2020-08-04 16:38:51 +0800 | [diff] [blame] | 147 | /* H3 : SX_EXIT_HOLDOFF# ==> SD_PERST_L */ |
| 148 | PAD_CFG_GPO(GPP_H3, 1, DEEP), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 149 | /* H6 : I2C3_SDA */ |
| 150 | PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), |
| 151 | /* H7 : I2C3_SCL */ |
| 152 | PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), |
| 153 | /* H12 : M2_SKT2_CFG0 ==> NC */ |
| 154 | PAD_NC(GPP_H12, NONE), |
| 155 | /* H13 : M2_SKT2_CFG1 # ==> SPKR_INT# */ |
| 156 | PAD_CFG_GPI(GPP_H13, NONE, DEEP), |
| 157 | /* H14 : M2_SKT2_CFG2 # ==> NC */ |
| 158 | PAD_NC(GPP_H14, NONE), |
| 159 | /* H15 : M2_SKT2_CFG3 # ==> NC */ |
| 160 | PAD_NC(GPP_H15, NONE), |
| 161 | /* H16 : DDPB_CTRLCLK ==> NC */ |
| 162 | PAD_NC(GPP_H16, NONE), |
| 163 | /* H17 : DDPB_CTRLDATA ==> NC */ |
| 164 | PAD_NC(GPP_H17, NONE), |
John Su | 830c77e | 2020-08-19 18:37:22 +0800 | [diff] [blame] | 165 | /* H19 : TIME_SYNC0 ==> USER_PRES_FP_ODL */ |
| 166 | PAD_CFG_GPI(GPP_H19, NONE, DEEP), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 167 | /* H23 : IMGCLKOUT4 ==> NC */ |
| 168 | PAD_NC(GPP_H23, NONE), |
| 169 | |
| 170 | /* R4 : HDA_RST# ==> NC */ |
| 171 | PAD_NC(GPP_R4, NONE), |
| 172 | /* R5 : HDA_SDI1 ==> NC */ |
| 173 | PAD_NC(GPP_R5, NONE), |
| 174 | /* R6 : I2S1_TXD ==> NC */ |
| 175 | PAD_NC(GPP_R6, NONE), |
| 176 | /* R7 : I2S1_SFRM ==> NC */ |
| 177 | PAD_NC(GPP_R7, NONE), |
| 178 | |
| 179 | /* S4 : SNDW2_CLK ==> SOC_DMIC_CLK1 */ |
| 180 | PAD_CFG_NF(GPP_S4, NONE, DEEP, NF2), |
| 181 | /* S5 : SNDW2_DATA ==> SOC_DMIC_DATA1 */ |
| 182 | PAD_CFG_NF(GPP_S5, NONE, DEEP, NF2), |
| 183 | |
| 184 | /* GPD11: LANPHYC ==> NC */ |
| 185 | PAD_NC(GPD11, NONE), |
Frank Wu | bc83738 | 2020-03-13 16:41:10 +0800 | [diff] [blame] | 186 | }; |
| 187 | |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 188 | const struct pad_config *variant_override_gpio_table(size_t *num) |
Frank Wu | bc83738 | 2020-03-13 16:41:10 +0800 | [diff] [blame] | 189 | { |
| 190 | *num = ARRAY_SIZE(gpio_table); |
| 191 | return gpio_table; |
| 192 | } |
| 193 | |
| 194 | /* Early pad configuration in bootblock */ |
| 195 | static const struct pad_config early_gpio_table[] = { |
Michael Niewöhner | cf2f700 | 2020-12-21 03:46:58 +0100 | [diff] [blame] | 196 | /* C8 : UART0 RX */ |
| 197 | PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), |
| 198 | /* C9 : UART0 TX */ |
| 199 | PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), |
| 200 | |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 201 | /* A12 : SATAXPCIE1 ==> M2_SSD_PEDET */ |
| 202 | PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1), |
Alex Levin | ecf06e5 | 2020-12-09 15:37:47 -0800 | [diff] [blame] | 203 | /* A13 : PMC_I2C_SCL ==> BT_DISABLE_L */ |
| 204 | /* assert reset on reboot */ |
| 205 | PAD_CFG_GPO(GPP_A13, 0, DEEP), |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 206 | /* A17 : DDSP_HPDC ==> MEM_CH_SEL */ |
| 207 | PAD_CFG_GPI(GPP_A17, NONE, DEEP), |
| 208 | |
| 209 | /* B11 : PMCALERT# ==> PCH_WP_OD */ |
| 210 | PAD_CFG_GPI_GPIO_DRIVER(GPP_B11, NONE, DEEP), |
| 211 | |
| 212 | /* B15 : GSPI0_CS0# ==> PCH_GSPI0_H1_TPM_CS_L */ |
| 213 | PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1), |
| 214 | |
| 215 | /* B16 : GSPI0_CLK ==> PCH_GSPI0_H1_TPM_CLK */ |
| 216 | PAD_CFG_NF(GPP_B16, NONE, DEEP, NF1), |
| 217 | |
| 218 | /* B17 : GSPI0_MISO ==> PCH_GSPIO_H1_TPM_MISO */ |
| 219 | PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1), |
| 220 | |
| 221 | /* B18 : GSPI0_MOSI ==> PCH_GSPI0_H1_TPM_MOSI_STRAP */ |
| 222 | PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1), |
| 223 | |
| 224 | /* C0 : SMBCLK ==> EN_PP3300_WLAN */ |
| 225 | PAD_CFG_GPO(GPP_C0, 1, DEEP), |
| 226 | |
| 227 | /* C21 : UART2_TXD ==> H1_PCH_INT_ODL */ |
| 228 | PAD_CFG_GPI_APIC(GPP_C21, NONE, PLTRST, LEVEL, INVERT), |
| 229 | |
| 230 | /* C22 : UART2_RTS# ==> PCH_FPMCU_BOOT0 */ |
| 231 | PAD_CFG_GPO(GPP_C22, 0, DEEP), |
| 232 | |
Frank Wu | 9c7c09f | 2020-08-04 16:38:51 +0800 | [diff] [blame] | 233 | /* D16 : ISH_UART0_CTS# ==> EN_PP3300_SD */ |
| 234 | PAD_CFG_GPO(GPP_D16, 1, DEEP), |
| 235 | |
Hsuan-ting Chen | 642508a | 2021-10-27 10:59:41 +0000 | [diff] [blame] | 236 | /* F17 : WWAN_RF_DISABLE_ODL ==> EC_IN_RW_OD */ |
| 237 | PAD_CFG_GPI(GPP_F17, NONE, DEEP), |
| 238 | |
Frank Wu | b763a4f | 2020-05-15 15:21:31 +0800 | [diff] [blame] | 239 | /* H11 : SRCCLKREQ5# ==> WLAN_PERST_L */ |
| 240 | PAD_CFG_GPO(GPP_H11, 1, DEEP), |
Frank Wu | bc83738 | 2020-03-13 16:41:10 +0800 | [diff] [blame] | 241 | }; |
| 242 | |
| 243 | const struct pad_config *variant_early_gpio_table(size_t *num) |
| 244 | { |
| 245 | *num = ARRAY_SIZE(early_gpio_table); |
| 246 | return early_gpio_table; |
| 247 | } |
Nick Vaccaro | 2f78ce0 | 2021-02-16 19:06:16 -0800 | [diff] [blame] | 248 | |
| 249 | /* GPIO settings before entering S5 */ |
| 250 | static const struct pad_config s5_sleep_gpio_table[] = { |
| 251 | PAD_CFG_GPO(GPP_C23, 0, DEEP), /* FPMCU_RST_ODL */ |
| 252 | PAD_CFG_GPO(GPP_A21, 0, DEEP), /* EN_FP_PWR */ |
| 253 | }; |
| 254 | |
| 255 | const struct pad_config *variant_sleep_gpio_table(u8 slp_typ, size_t *num) |
| 256 | { |
| 257 | if (slp_typ == ACPI_S5) { |
| 258 | *num = ARRAY_SIZE(s5_sleep_gpio_table); |
| 259 | return s5_sleep_gpio_table; |
| 260 | } |
| 261 | *num = 0; |
| 262 | return NULL; |
| 263 | } |
Matt DeVillier | 7ed6130 | 2022-12-21 08:38:17 -0600 | [diff] [blame^] | 264 | |
| 265 | /* GPIOs needed to be set in romstage. */ |
| 266 | static const struct pad_config romstage_gpio_table[] = { |
| 267 | /* Enable touchscreen, hold in reset */ |
| 268 | /* A8 : I2S2_SFRM ==> EN_PP3300_TOUCHSCREEN */ |
| 269 | PAD_CFG_GPO(GPP_A8, 1, DEEP), |
| 270 | /* C10 : UART0_RTS# ==> USI_RST_L */ |
| 271 | PAD_CFG_GPO(GPP_C10, 0, DEEP), |
| 272 | }; |
| 273 | |
| 274 | const struct pad_config *variant_romstage_gpio_table(size_t *num) |
| 275 | { |
| 276 | *num = ARRAY_SIZE(romstage_gpio_table); |
| 277 | return romstage_gpio_table; |
| 278 | } |