Dennis Wassenberg | bd10516 | 2015-09-10 12:20:58 +0200 | [diff] [blame] | 1 | ## |
| 2 | ## This file is part of the coreboot project. |
| 3 | ## |
| 4 | ## Copyright (C) 2016 secunet Security Networks AG |
| 5 | ## |
| 6 | ## This program is free software; you can redistribute it and/or modify |
| 7 | ## it under the terms of the GNU General Public License as published by |
| 8 | ## the Free Software Foundation; version 2 of the License. |
| 9 | ## |
| 10 | ## This program is distributed in the hope that it will be useful, |
| 11 | ## but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | ## GNU General Public License for more details. |
| 14 | ## |
| 15 | |
| 16 | chip northbridge/intel/sandybridge |
| 17 | # IGD Displays |
| 18 | register "gfx.ndid" = "4" |
| 19 | register "gfx.did" = "{ 0x80000400, 0x80000300, 0x80000301, 0x80000100, }" |
| 20 | |
| 21 | # Enable Panel as eDP and configure power delays |
| 22 | register "gpu_panel_port_select" = "1" # eDP_A |
| 23 | register "gpu_panel_power_cycle_delay" = "6" # 500ms |
| 24 | register "gpu_panel_power_up_delay" = "2000" # 200ms |
| 25 | register "gpu_panel_power_down_delay" = "500" # 50ms |
| 26 | register "gpu_panel_power_backlight_on_delay" = "1" # 100us as recommended by PRM |
| 27 | register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms |
| 28 | |
| 29 | # Set backlight PWM values for eDP |
| 30 | register "gpu_cpu_backlight" = "0x00000ac8" |
| 31 | register "gpu_pch_backlight" = "0x13120000" |
| 32 | |
| 33 | device cpu_cluster 0 on |
Dennis Wassenberg | bd10516 | 2015-09-10 12:20:58 +0200 | [diff] [blame] | 34 | chip cpu/intel/model_206ax |
| 35 | # Magic APIC ID to locate this chip |
Arthur Heymans | 7e6946a | 2019-01-21 17:55:02 +0100 | [diff] [blame^] | 36 | device lapic 0x0 on end |
Arthur Heymans | b3f2323 | 2019-01-21 17:48:55 +0100 | [diff] [blame] | 37 | device lapic 0xacac off end |
Dennis Wassenberg | bd10516 | 2015-09-10 12:20:58 +0200 | [diff] [blame] | 38 | |
| 39 | register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) |
| 40 | register "c2_acpower" = "4" # ACPI(C2) = MWAIT(C6) |
| 41 | register "c3_acpower" = "0" |
| 42 | |
| 43 | register "c1_battery" = "1" # ACPI(C1) = MWAIT(C1) |
| 44 | register "c2_battery" = "4" # ACPI(C2) = MWAIT(C6) |
| 45 | register "c3_battery" = "0" |
| 46 | end |
| 47 | end |
| 48 | |
| 49 | device domain 0 on |
| 50 | device pci 00.0 on end # host bridge |
| 51 | device pci 02.0 on end # vga controller |
| 52 | |
| 53 | chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH |
| 54 | # LPC i/o generic decodes |
| 55 | register "gen1_dec" = "0x003c0a01" # ITE environment controller |
| 56 | register "gen2_dec" = "0x000403e9" # additional com port |
| 57 | register "gen3_dec" = "0x000402e9" # additional com port |
| 58 | |
| 59 | # Enable both SATA ports 0, 1 |
| 60 | register "sata_port_map" = "0x03" |
| 61 | # Set max SATA speed to 6.0 Gb/s (should be the default, anyway) |
| 62 | register "sata_interface_speed_support" = "0x3" |
| 63 | |
| 64 | # Route GPI7 (EC SCI) as SCI |
| 65 | register "gpi7_routing" = "2" |
| 66 | |
| 67 | # Enable GPE17 (GPI7) and TCO SCI |
| 68 | register "gpe0_en" = "0x00800040" |
| 69 | |
| 70 | # Disable root port coalescing |
| 71 | register "pcie_port_coalesce" = "0" |
| 72 | register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 1, 1 }" |
| 73 | |
| 74 | register "p_cnt_throttling_supported" = "1" |
| 75 | |
| 76 | register "xhci_overcurrent_mapping" = "0x00000c03" |
| 77 | register "xhci_switchable_ports" = "0x0f" |
| 78 | register "superspeed_capable_ports" = "0x0f" |
| 79 | |
| 80 | register "spi_uvscc" = "0x2005" |
| 81 | register "spi_lvscc" = "0x2005" |
| 82 | |
| 83 | device pci 14.0 on end # USB 3.0 Controller |
| 84 | device pci 16.0 on end # Management Engine Interface 1 |
| 85 | device pci 16.1 off end # Management Engine Interface 2 |
| 86 | device pci 16.2 off end # Management Engine IDE-R |
| 87 | device pci 16.3 off end # Management Engine KT |
| 88 | device pci 19.0 on end # Intel Gigabit Ethernet |
| 89 | device pci 1a.0 on end # USB2 EHCI #2 |
| 90 | device pci 1b.0 on # High Definition Audio |
| 91 | subsystemid 0x1a86 0x4352 |
| 92 | end |
| 93 | |
| 94 | # Disabling 1c.0 might break IRQ settings as it enables port coalescing |
| 95 | device pci 1c.0 on end # PCIe Port #1 |
| 96 | device pci 1c.1 on end # PCIe Port #2 |
| 97 | device pci 1c.2 on end # PCIe Port #3 |
| 98 | device pci 1c.3 on end # PCIe Port #4 |
| 99 | device pci 1c.4 on end # PCIe Port #5 |
| 100 | device pci 1c.5 on end # PCIe Port #6 |
| 101 | device pci 1c.6 on end # PCIe Port #7 |
| 102 | device pci 1c.7 on end # PCIe Port #8 |
| 103 | |
| 104 | device pci 1d.0 on end # USB2 EHCI #1 |
| 105 | device pci 1e.0 off end # PCI bridge |
| 106 | device pci 1f.0 on # LPC bridge |
| 107 | chip ec/roda/it8518 |
| 108 | register "cpuhot_limit" = "100" |
| 109 | # 60h/64h KBC |
| 110 | device pnp ff.0 on # dummy address |
| 111 | end |
| 112 | end |
| 113 | chip superio/ite/it8783ef |
Vagiz Trakhanov | 17c5771 | 2017-09-28 14:21:54 +0000 | [diff] [blame] | 114 | register "TMPIN1.mode" = "THERMAL_RESISTOR" |
| 115 | register "TMPIN2.mode" = "THERMAL_RESISTOR" |
Elyes HAOUAS | b0f1988 | 2018-06-09 11:59:00 +0200 | [diff] [blame] | 116 | register "ec.vin_mask" = "VIN_ALL" |
Dennis Wassenberg | bd10516 | 2015-09-10 12:20:58 +0200 | [diff] [blame] | 117 | register "FAN1.mode" = "FAN_SMART_AUTOMATIC" |
| 118 | register "FAN1.smart.tmpin" = " 1" |
| 119 | register "FAN1.smart.tmp_off" = "60" |
| 120 | register "FAN1.smart.tmp_start" = "64" |
| 121 | register "FAN1.smart.tmp_delta" = " 2" |
| 122 | register "FAN1.smart.pwm_start" = "30" |
| 123 | register "FAN1.smart.slope" = "64" |
| 124 | register "FAN2.mode" = "FAN_SMART_AUTOMATIC" |
| 125 | register "FAN2.smart.tmpin" = " 1" |
| 126 | register "FAN2.smart.tmp_off" = "60" |
| 127 | register "FAN2.smart.tmp_start" = "64" |
| 128 | register "FAN2.smart.tmp_delta" = " 2" |
| 129 | register "FAN2.smart.pwm_start" = "30" |
| 130 | register "FAN2.smart.slope" = "64" |
| 131 | register "FAN3.mode" = "FAN_MODE_OFF" |
| 132 | device pnp 2e.0 off end # Floppy |
| 133 | device pnp 2e.1 on # COM 1 |
| 134 | io 0x60 = 0x3f8 |
| 135 | irq 0x70 = 4 |
| 136 | end |
| 137 | device pnp 2e.2 on # COM 2 |
| 138 | io 0x60 = 0x2f8 |
| 139 | irq 0x70 = 3 |
| 140 | end |
| 141 | device pnp 2e.3 on # Printer Port |
| 142 | io 0x60 = 0x378 |
| 143 | io 0x62 = 0x000 |
| 144 | irq 0x70 = 7 |
| 145 | drq 0x74 = 4 |
| 146 | irq 0xf0 = 0x00 |
| 147 | end |
| 148 | device pnp 2e.4 on # Environment Controller |
| 149 | io 0x60 = 0xa30 |
| 150 | io 0x62 = 0xa20 |
| 151 | irq 0x70 = 0 |
| 152 | irq 0xf0 = 0x80 |
| 153 | end |
| 154 | device pnp 2e.5 off end # Keyboard |
| 155 | device pnp 2e.6 off end # Mouse |
| 156 | device pnp 2e.7 off end # GPIO |
| 157 | device pnp 2e.8 on # COM 3 |
| 158 | io 0x60 = 0x3e8 |
| 159 | irq 0x70 = 4 |
| 160 | end |
| 161 | device pnp 2e.9 on # COM 4 |
| 162 | io 0x60 = 0x2e8 |
| 163 | irq 0x70 = 3 |
| 164 | end |
| 165 | device pnp 2e.a off end # COM 5 |
| 166 | device pnp 2e.b off end # COM 6 |
| 167 | device pnp 2e.c off end # CIR |
| 168 | end |
| 169 | end # LPC bridge |
| 170 | device pci 1f.2 on end # SATA Controller 1 |
| 171 | device pci 1f.3 on end # SMBus |
| 172 | device pci 1f.5 off end # SATA Controller 2 |
| 173 | device pci 1f.6 off end # Thermal |
| 174 | end |
| 175 | end |
| 176 | end |